Controle digital através de dispositivo FPGA aplicado a um retificador trifásico híbrido operando com modulação por histerese variável
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Data
2008-12-15
Autores
Soares, Jurandir de Oliveira [UNESP]
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Editor
Universidade Estadual Paulista (Unesp)
Resumo
O objetivo deste trabalho é a concepção de uma lógica de controle digital com modulação por histerese variável usando um dispositivo programável FPGA (Field Programmable Gate Array) e linguagem de descrição de hardware VHDL (Hardware Description Language), aplicada em um retificador trifásico híbrido para a obtenção do Fator de Potência (FP) de entrada quase unitário. O Retificador Trifásico Híbrido (RTH) é uma estrutura composta por um retificador a diodos de 6 pulsos e por três retificadores monofásicos SEPIC conectados em paralelo. O controle digital proposto é capaz de impor a forma de onda das correntes de entrada, obtendose Distorção Harmônica Total (DHT) reduzida e fator de potência (FP) quase unitário, sendo que nesta condição, os retificadores monofásicos SEPIC conduzirão no máximo 33% da potência ativa total. Além disso, o uso de FPGAs dará ao Retificador Híbrido Trifásico uma flexibilidade adicional na operação, podendo substituir vários sistemas de múltiplos pulsos convencionais e reduzir custos para o sistema de controle por eliminar a confecção de circuitos complexos de controle analógico, para os conversores chaveados. Neste trabalho, apresenta-se uma análise detalhada e metodologia de projeto para o Retificador Híbrido Trifásico (RTH) que possibilita relacionar o valor da DHT das correntes de entrada com os valores das potências média e aparente processadas pelas estruturas controlada e não-controlada, podendo-se prever o desempenho global do sistema. Serão apresentados detalhes sobre o funcionamento do código VHDL e da modulação por histerese variável empregada e, por fim, os resultados experimentais de um protótipo implementado para 3,0 kW. O código VHDL desenvolvido, associado à lógica de controle digital proposta, foi implementado através de um dispositivo FPGA da Xilinx – Spartan XC2S200E, módulo digilab-D2E...
The objective of this work is the development of a digital control logic with variable hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier in order to obtain an almost unitary input power factor (PF). The hybrid three-phase rectifier is a structure composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The proposed digital control is capable to impose input current waveforms, resulting in a reduced THD (Total Harmonic Distortion) and almost unitary input power factor, being that in this operation condition the parallel SEPIC single-phase rectifiers will process only 33.0 % of total active power. Moreover, the use of FPGA will provide to hybrid three-phase rectifier an additional flexbility in its operation, making possible the replacement of same conventional systems of multiple pulses and reducing costs for the control system, through the elimination of complex analogical circuitry used in the controlled converters. In this work is presented a detailed analysis and design methodology to hybrid threephase rectifier that establishes a relationship between the THD imposed to line input currents, with the average and apparent powers processed through controlled and uncontrolled structures, making possible to know previously the global system performance. It will be presented details about the operation of the VHDL code and variable hysteresis modulation proposed, and finally the experimental results from an implemented 3.0 kW prototype. The developed VHDL code, considering the proposed digital control logic, was implemented through a Xilinx’s FPGA device – Spartan XC2S200E, digilab-D2E module, whose generated control signals resulted in input currents with practically sinusoidal waveforms... (Complete abstract click electronic access below)
The objective of this work is the development of a digital control logic with variable hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier in order to obtain an almost unitary input power factor (PF). The hybrid three-phase rectifier is a structure composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The proposed digital control is capable to impose input current waveforms, resulting in a reduced THD (Total Harmonic Distortion) and almost unitary input power factor, being that in this operation condition the parallel SEPIC single-phase rectifiers will process only 33.0 % of total active power. Moreover, the use of FPGA will provide to hybrid three-phase rectifier an additional flexbility in its operation, making possible the replacement of same conventional systems of multiple pulses and reducing costs for the control system, through the elimination of complex analogical circuitry used in the controlled converters. In this work is presented a detailed analysis and design methodology to hybrid threephase rectifier that establishes a relationship between the THD imposed to line input currents, with the average and apparent powers processed through controlled and uncontrolled structures, making possible to know previously the global system performance. It will be presented details about the operation of the VHDL code and variable hysteresis modulation proposed, and finally the experimental results from an implemented 3.0 kW prototype. The developed VHDL code, considering the proposed digital control logic, was implemented through a Xilinx’s FPGA device – Spartan XC2S200E, digilab-D2E module, whose generated control signals resulted in input currents with practically sinusoidal waveforms... (Complete abstract click electronic access below)
Descrição
Palavras-chave
Fator de potencia, Sistemas de controle digital, VHDL (Linguagem descritiva de hardware), Retificador híbrido, Dispositivo FPGA, Active power-factor correction, Digital control, FPGA device, Hybrid rectifier, Hysteresis modulation
Como citar
SOARES, Jurandir de Oliveira. Controle digital através de dispositivo FPGA aplicado a um retificador trifásico híbrido operando com modulação por histerese variável. 2008. 276 f. Tese (doutorado) - Universidade Estadual Paulista, Faculdade de Engenharia de Ilha Solteira, 2008.