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ItemTrabalho apresentado em evento A new high voltage polymer insulator for electrical distribution system from oil of Mamoma trees.(Institute of Electrical and Electronics Engineers (IEEE), 1995-01-01) Astorga, OAM; Sakamoto, W.; Chierice, G.; Brito, FJA; Universidade Estadual Paulista (Unesp)Exibir mais ItemArtigo Effective aspect-ratio and gate-capacitance in circular geometry MOS transistors(Elsevier B.V., 1996-10-01) DeLima, J. A.; Universidade Estadual Paulista (Unesp)Exibir mais ItemTrabalho apresentado em evento Synchronous machines parameters identification using load rejection test data(1997-01-01) da Costa Bortoni, Edson [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais This work shows a computational methodology for the determination of synchronous machines parameters using load rejection test data. The quadrature axis parameters are obtained with a rejection under an arbitrary reference, reducing the present difficulties.Exibir mais ItemTrabalho apresentado em evento On optimizing micropower MOS regulated cascode circuits on switched current techniques(1998-01-01) Lima, J. A. de [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.Exibir mais ItemArtigo Optimization procedures in the design of continuous induction hardening and tempering installations for magnetic steel bars(1998-12-01) Dughiero, Fabrizio; Battistetti, Mara; Alves, Maysa Nunes [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais An inverse problem concerning the industrial process of steel bars hardening and tempering is considered. The associated optimization problem is formulated in terms of membership functions and, for the sake of comparison, also in terms of quadratic residuals; both geometric and electromagnetic design variables have been considered. The numerical solution is achieved by coupling a finite difference procedure for the calculation of the electromagnetic and thermal fields to a deterministic strategy of minimization based on modified Flctcher and Reeves method. © 1998 IEEE.Exibir mais ItemTrabalho apresentado em evento A CMOS class-AB instrumentation amplifier for micropower applications(1998-12-01) De Lima, Jader A. [UNESP]; Silva, Sidnei F. [UNESP]; Universidade Estadual Paulista (UNESP)Exibir mais A simple micropower CMOS instrumentation amplifier comprising a double-input Gm-stage and a low-distortion class-AB output stage is presented. The amplifier was designed according to micropower techniques to achieve high values of low-frequency differential-gain and common-mode rejection and integrated in a digital-oriented 0.7μm n-Well CMOS process. For a bias current of 130nA, amplifier standby power consumption is 26μW. Measurements revealed good characteristics at DC and low frequencies such as A dm=87dB and CMRR=-137dB. For a compensation capacitor of 4.5pF, it was found ΦM=73° and a unity-gain frequency of 47KHz. Offset voltage was below 0.7mV, typically. Resistive loads down to 10KΩ can be driven with a 1.3V peak-to-peak swing. Overall linearity is represented by a THD of - 42.9dB. Although bandwidth limitation occurs due to small bias currents, the proposed amplified can be advantageously employed in many control and low-frequency signal processing. © 1998 Editions Frontieres.Exibir mais ItemTrabalho apresentado em evento A tunable triode-MOSFET transconductor and its application to g(m)-C filters(Institute of Electrical and Electronics Engineers (IEEE), 1999-01-01) De Lima, J. A.; Dualibe, C.; Universidade Estadual Paulista (Unesp)Exibir mais A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor operating in triode region is settled by a regulation loop and a first-order linear relationship between g(m) and a de bias voltage is achieved. In addition to easy tuning, this technique offers circuit simplicity, wide dynamic range, high input and output impedances and low consumption. The transconductor is presented on both single-ended and fully-differential versions. A 3rd-order elliptical low-pass g(m)-C filter with a nominal roll-off frequency of 2MHz is used as one example for the many applications of the proposed transconductor. SPICE data describe circuits performances and filter tunabilily Passband is tuned at a rate of 2.36KHz/mV and good linearity is indicated by a 0.89% THD for an 800mV(p-p) balanced-driven input.Exibir mais ItemTrabalho apresentado em evento A low-power silicon-on-insulator PWM discriminator for biomedical applications(Institute of Electrical and Electronics Engineers (IEEE), 2000-01-01) Lima, Jader A. de [UNESP]; Silva, Sidnei F. [UNESP]; Cordeiro, Adriano S. [UNESP]; Araujo, Alexandro C. [UNESP]; Verleysen, Michel [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A CMOS/SOI circuit to decode PWM signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a double-integration concept and does not require dc filtering. Nonoverlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mu m single-metal SOI fabrication process and has an effective area of 2mm(2) Typically, the measured resolution of encoding parameter a was better than 10% at 6MHz and V-DD=3.3V. Stand-by consumption is around 340 mu W. Pulses with frequencies up to 15MHz and alpha = 10% can be discriminated for V-DD spanning from 2.3V to 3.3V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.Exibir mais ItemArtigo Level crossing rate of Nakagami-m fading signal: Field trials and validation(Institute of Electrical and Electronics Engineers (IEEE), 2000-02-17) Yacoub, M. D.; Barbin, M. V.; de Castro, M. S.; Vargas, J. E.; Universidade Estadual de Campinas (UNICAMP); Universidade Estadual Paulista (Unesp)Exibir mais Field trial measurements are used to validate the level crossing rate formula derived in an exact manner recently for the Nakagami-m signal. The formula reveals an excellent fit to measurements in situations other than those for which the Rice model is more appropriate.Exibir mais ItemArtigo Second-order statistics for equal gain and maximal ratio diversity-combining reception(Institute of Electrical and Electronics Engineers (IEEE), 2000-02-17) Yacoub, M. D.; da Silva, CRCM; Vargas, J. E.; Universidade Estadual de Campinas (UNICAMP); Universidade Estadual Paulista (Unesp)Exibir mais Exact and closed-form expressions for the level crossing rate and average fade duration are presented for equal gain combining and maximal ratio combining schemes, assuming an arbitrary number of independent branches in a Rayleigh environment. The analytical results are thoroughly validated by simulation.Exibir mais ItemArtigo Settling analysis of MOS regulated current mirrors applied to micropower D/A converters(Kluwer Academic Publ, 2000-08-01) De Lima, J. A.; Universidade Estadual Paulista (Unesp)Exibir mais This paper provides an insight to the trade-off between settling time and power consumption in regulated current mirrors as building parts in micropower current-switching D/A converters. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are evaluated. Raising pole frequencies in micropower circuits, while meeting consumption requirements, is basically limited by parasitic capacitances. For such cases, an alternative is to impose a twin-pole condition in which design constraints are somewhat relieved and settling slightly improved. Relationships between pole frequencies, transistor geometry and bias are established and design guidelines for regulated current mirrors founded. By placing loop-transistors in either weak or strong inversion, small (W/L) ratios are allowed and stray capacitances reduced. Simulated waveforms suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves both simulated and experimental settling performance.Exibir mais ItemTrabalho apresentado em evento A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift(2001-01-01) De Lima, J. A. [UNESP]; Dualibe, C. [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.Exibir mais ItemTrabalho apresentado em evento An accurate low-voltage analog memory-cell with built-in multiplication(2001-01-01) De Lima, J. A. [UNESP]; Cordeiro, A. S. [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.Exibir mais ItemTrabalho apresentado em evento On designing OTA-C graphic-equalizers with MOSFET-triode transconductors(2001-01-01) De Lima, J. A. [UNESP]; Petraglia, A. [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A CMOS audio-equalizer based on a parallel-array of 2nd-order bandpass-sections is presented and realized with triode transconductors. It has a programmable 12db-boost/cut on each of its three decade-bands, easily achieved through the linear dependence of gm on VDS. In accordance with a 0.8μm n-well double-metal fabrication process, a range of simulations supports theoretical analysis and circuit performance at different boost/cut scenarios. For VDD=3.3V, fullboosting stand-by prover consumption is 1.05mW. THD=-42.61dB@1Vpp and may be improved by balanced structures. Thermal- and I/f-noise spectral densities are 3.2μV/Hz12 and 18.2μV/Hz12@20Hz, respectively, for a dynamic range of 52.3dB@1Vpp. The equalizer effective area is 2.4mm2. The drawback of the existing transmission-zero due to the feedthrough-capacitance of a triode input-device is also addressed. The proposed topology can be extended to the design of more complex graphic-equalizers and hearing-aids.Exibir mais ItemTrabalho apresentado em evento A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency(2001-01-01) De Lima, J. A. [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.Exibir mais ItemArtigo A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to (gm)-C filters(Institute of Electrical and Electronics Engineers (IEEE), 2001-07-01) De Lima, J. A.; Dualibe, C.; Universidade Estadual Paulista (Unesp); Univ Catolica Cordoba; Catholic Univ LouvainExibir mais A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that considerably improves the stability of the processed-signal common,mode voltage over the tuning range, critical for very-low voltage applications, is introduced. It embeds a feedback loop that holds input devices on triode region while boosting the output resistance. Analysis of the integrator frequency response gives an insight into the location of secondary poles and zeros as function of design parameters. A third-order low-pass Cauer filter employing the proposed transconductor was designed and integrated on a 0.8-mum n-well CMOS standard process. For a 1.8-V supply, filter characterization revealed f(p) = 0.93 MHz, f(s) = 1.82 MHz, A(min) = 44.08, dB, and A(max) = 0.64 dB at nominal tuning. Mined by a de voltage V-TUNE, the filter bandwidth was linearly adjusted at a rate of 11.48 kHz/mV over nearly one frequency decade. A maximum 13-mV deviation on the common-mode voltage at the filter output was measured over the interval 25 mV less than or equal to V-TUNE less than or equal to 200 mV. For V-out = 300 mV(pp) and V-TUNE = 100 mV, THD was -55.4 dB. Noise spectral density was 0.84 muV/Hz(1/2) @1 kHz and S/N = 41 dB @ V-out = 300 mV(pp) and 1-MHz bandwidth. Idle power consumption was 1.73 mW @V-TUNE = 100 mV. A tradeoff between dynamic range, bandwidth, power consumption, and chip area has then been achieved.Exibir mais ItemTrabalho apresentado em evento A simple constant-current neural stimulator with accurate pulse-amplitude control(2001-12-01) De Lima, J. A. [UNESP]; Cordeiro, A. S. [UNESP]; Universidade Estadual Paulista (Unesp)Exibir mais A simple constant-current electrocutaneous stimulator for high-impedance loads using low-cost, standard high-voltage components is presented. A voltage-regulator powers an oscillator built across the primary of a transformer whose secondary delivers, after rectification, the high-voltage supply to switched current-mirrors in the driving stage. Since the compliance high-voltage is proportional to the stimulation current, overall power consumption is minimized. By adjusting the regulated voltage, control of the pulsed-current amplitude is achieved. A prototype with readily available components features stimulation currents of amplitude and pulsewidth in the range 0≤Iskin≤20mA and 50μs ≤Tpulse≤1ms, respectively. Pulse-repetition spans from 1 Hz to 10Hz. Worst-case ripple is 3.7% @Iskin=1mA. Measured pulse fall-time is shorter than 32μs. Overall consumption is 4.4W @Iskin=20mA. Subject isolation from line is 4KV.Exibir mais ItemArtigo Automatic tuning of linearly tunable high-Q filters(2002-01-01) Karşilayan, Aydin I.; Huang, Sung-Ling; De Lima, Jader A. [UNESP]; Texas A and M University; Universidade Estadual Paulista (UNESP)Exibir mais A new tuning scheme for linearly tunable high-Q filters is proposed. The tuning scheme uses the phase information for both frequency and Q factor tuning, therefore no relationship between filter's passband magnitude and Q is required. To reduce the simulation overhead, operation of the tuning circuit is verified on a symbolic filter whose parameters were derived from the transistor level circuit. At 10 MHz, for a desired Q of 20, simulated frequency and Q tuning errors are 0.3% and 1.7%, respectively.Exibir mais ItemArtigo Design, manufacturing, and testing of a Nb3Sn coil employing Ti alloy as structural material(Institute of Electrical and Electronics Engineers (IEEE), 2002-03-01) Baldan, C. A.; Shigue, C. Y.; Pinatti, D. G.; Ruppert, E.; Universidade de São Paulo (USP); Universidade Estadual Paulista (Unesp); Universidade Estadual de Campinas (UNICAMP)Exibir mais We describe the design, manufacturing, and testing results of a Nb3Sn superconducting coil in which TiAIV alloys were used instead of stainless steel to reduce the magnetization contribution caused by the heat treatment for the A-15 Nb-3 Sn phase formation that affects the magnetic field homogeneity. Prior to the coil manufacturing several structural materials were studied and evaluated in terms of their mechanical and magnetic properties in as-worked, welded, and heat-treated conditions. The manufacturing process employed the wind-and-react technique followed by vacuum-pressure impregnation(VPI) at 1 MPa atm. The critical steps of the manufacturing process, besides the heat treatment and impregnation, are the wire splicing and joint manufacturing in which copper posts supported by Si3N4 ceramic were used. The coil was tested with and without a background NbTi coil and the results have shown performance exceeding the design quench current confirming the successful coil construction.Exibir mais ItemArtigo A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications(Taylor & Francis Ltd, 2002-08-01) De Lima, J. A.; Silva, S. F.; Cordeiro, A. S.; Verleysen, M.; Universidade Estadual Paulista (Unesp); Univ Catholique LouvainExibir mais A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.Exibir mais