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Performance of differential pair circuits designed with line tunnel FET devices at different temperatures

dc.contributor.authorMartino, M. D.V.
dc.contributor.authorMartino, J. A.
dc.contributor.authorAgopian, P. G.D. [UNESP]
dc.contributor.authorRooyackers, R.
dc.contributor.authorSimoen, E.
dc.contributor.authorCollaert, N.
dc.contributor.authorClaeys, C.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionImec
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:54:23Z
dc.date.available2018-12-11T16:54:23Z
dc.date.issued2018-06-06
dc.description.abstractThis work studies differential pair circuits designed with Line tunnel field effect transistors (TFETs), comparing their suitability with conventional Point TFETs. Differential voltage gain (A d), compliance voltage and sensitivity to channel length mismatch are analyzed experimentally for different temperatures. The first part highlights individual characteristics of Line TFETs, focusing on behaviors that affect analog circuits. In comparison to Point TFETs, Line TFETs present higher drive current, better transconductance and worse output conductance. In the second part, differential pairs are studied at room temperature for different dimensions and bias conditions. Line TFETs present the highest A d, while Point TFET decrease the susceptibility to channel length mismatch. In the last part, the temperature impact is investigated. Based on the activation energy, the impact of band-to-band tunneling and trap-assisted tunneling is discussed for different bias conditions. A general equation is proposed, including the technology and the susceptibility to temperature and dimensions. It was observed that Line TFETs are a good option to design differential pairs with higher A d and ON-state current than Point TFETs.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationSao Paulo State University (UNESP) Campus Sao Joao da Boa Vista
dc.description.affiliationImec
dc.description.affiliationE.E. Department KU Leuven
dc.description.affiliationUnespSao Paulo State University (UNESP) Campus Sao Joao da Boa Vista
dc.identifierhttp://dx.doi.org/10.1088/1361-6641/aac4fd
dc.identifier.citationSemiconductor Science and Technology, v. 33, n. 7, 2018.
dc.identifier.doi10.1088/1361-6641/aac4fd
dc.identifier.file2-s2.0-85049775156.pdf
dc.identifier.issn1361-6641
dc.identifier.issn0268-1242
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-85049775156
dc.identifier.urihttp://hdl.handle.net/11449/171203
dc.language.isoeng
dc.relation.ispartofSemiconductor Science and Technology
dc.relation.ispartofsjr0,757
dc.relation.ispartofsjr0,757
dc.rights.accessRightsAcesso abertopt
dc.sourceScopus
dc.subjectanalog performance
dc.subjectdifferential pair
dc.subjectFinFET
dc.subjectLine TFET
dc.subjectPoint TFET
dc.titlePerformance of differential pair circuits designed with line tunnel FET devices at different temperaturesen
dc.typeArtigopt
dspace.entity.typePublication
unesp.author.lattes0496909595465696[3]
unesp.author.orcid0000-0003-2018-5092[1]
unesp.author.orcid0000-0002-0886-7798[3]
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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