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GR-Noise Characterization of Ge pFinFETs with STI First and STI Last Processes

dc.contributor.authorOliveira, Alberto V.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorMitard, Jerome
dc.contributor.authorAgopian, Paula G. D. [UNESP]
dc.contributor.authorMartino, Joao A.
dc.contributor.authorLanger, Robert
dc.contributor.authorWitters, Liesbeth J.
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.contributor.authorClaeys, Cor
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionKatholieke Universiteit Leuven
dc.contributor.institutionImec
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2018-12-11T16:43:41Z
dc.date.available2018-12-11T16:43:41Z
dc.date.issued2016-09-01
dc.description.abstractThis letter characterizes the generation-recombination noise of Ge pFinFETs, for three different integration schemes: shallow trench isolation (STI) first strained devices; STI last for relaxed and strained ones. It is shown that many Lorentzians exhibit a VGS-independent and thermally activated characteristic frequency. This points out that the responsible defects are located inside the fin and they are found for all studied process conditions. One type of defect with a time constant value of 10 ms at room temperature is process-independent. Regarding the defects, their activation energies and hole capture cross sections have been extracted for fin widths varying from planar-like devices to narrow ones. It is shown that the STI last strained and relaxed devices yield a surface trap density three orders of magnitude above the typical value obtained for a blanket wafer.en
dc.description.affiliationUniversity of Sao Paulo
dc.description.affiliationKatholieke Universiteit Leuven
dc.description.affiliationImec
dc.description.affiliationUNESP
dc.description.affiliationDepartment of Electrical Engineering Katholieke Universiteit Leuven
dc.description.affiliationUnespUNESP
dc.description.sponsorshipCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
dc.description.sponsorshipIdCAPES: BEX 10537/14-7
dc.format.extent1092-1095
dc.identifierhttp://dx.doi.org/10.1109/LED.2016.2595398
dc.identifier.citationIEEE Electron Device Letters, v. 37, n. 9, p. 1092-1095, 2016.
dc.identifier.doi10.1109/LED.2016.2595398
dc.identifier.file2-s2.0-84984838208.pdf
dc.identifier.issn0741-3106
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-84984838208
dc.identifier.urihttp://hdl.handle.net/11449/168935
dc.language.isoeng
dc.relation.ispartofIEEE Electron Device Letters
dc.relation.ispartofsjr1,361
dc.rights.accessRightsAcesso aberto
dc.sourceScopus
dc.subjectGe pFinFET
dc.subjectGR-noise characterization
dc.subjectSTI first
dc.subjectSTI last
dc.titleGR-Noise Characterization of Ge pFinFETs with STI First and STI Last Processesen
dc.typeArtigo
dspace.entity.typePublication
unesp.author.lattes0496909595465696[4]
unesp.author.orcid0000-0002-9289-5897[1]
unesp.author.orcid0000-0002-0886-7798[4]

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