Pré-regulador retificador entrelaçado (Interleaved) ZCS-FM boost, com controle digital através de dispositivo FPGA e linguagem VHDL
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Data
2005-10-27
Autores
Gonçalves, Flávio Alessandro Serrão [UNESP]
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Editor
Universidade Estadual Paulista (Unesp)
Resumo
Este trabalho apresenta a análise, projeto e implementação de um pré-regulador retificador boost formado por células de potência entrelaçadas (interleaving), empregando técnicas de comutação não dissipativa, operando no modo de condução crítica, e controlado por dispositivo FPGA (Field Programmable Gate Array). Células de comutação não dissipativa com corrente nula (ZCS - Zero Current Switching) são utilizadas para proporcionar condições para minimização das perdas durante a entrada em condução e bloqueio dos interruptores e dos diodos boost. As células de comutação não dissipativa do tipo ZCS operam na região de fronteira entre os modos de condução contínua e descontínua, denominado como modo de condução crítica, eliminando-se as desvantagens relacionadas com os efeitos da recuperação reversa dos diodos boost operando no modo de condução contínua, especificamente, perdas adicionais (devidas à recuperação reversa) e problemas de interferências eletromagnéticas (EMI - Electromagnetic Interference). Adicionalmente, devido à técnica de interleaving, as principais vantagens apresentadas pelo retificador incluem a redução da amplitude do ripple da corrente de entrada, a redução da amplitude do ripple de alta freqüência da tensão de saída, a possibilidade da utilização de semicondutores que apresentem menores capacidades de corrente e tensão, reduzido volume do filtro de EMI requerido, elevado fator de potência e reduzida distorção harmônica total (DHT) na corrente de entrada, em conformidade com a norma IEC61000-3-2. O controle digital foi desenvolvido empregando linguagem de descrição de hardware (VHDL - Hardware Description Language) e implementada utilizando o dispositivo FPGA XC2S200E-SpartanII-E/Xilinx. As análises teóricas, a modelagem para as técnicas digitais, as metodologias de projeto e exemplos...
This work presents the analysis, design and implementation of a single-phase high power factor boost rectifier composed of power cells in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by a Field Programmable Gate Array (FPGA) device. Zero-Current-Switching (ZCS) cells are used to provide conditions for non-dissipative commutations during the switches' and boost diodes' turn-on and turn-off. The ZCS cells operate at the boundary of continuous and discontinuous modes, designated as critical conduction mode, eliminating the disadvantages related recovery effects of boost diodes operated in continuous conduction mode, namely: additional losses, and electromagnetic interference (EMI) problems. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage high-frequency ripple, and the use of semiconductor devices with lower breakdown voltages and forward currents, low volume for the EMI input filter, high input power factor, and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using the XC2S200E-SpartanII-E/Xilinx FPGA device. Theoretical analyses, modeling for digital control, design methodologies and examples are presented. Laboratorial prototypes were implemented in order to provide the validation of proposed converter. Additionally, the experimental results are obtained from prototypes composed of two and four interleaved cells, rated at 1kW and 2kW, respectively.
This work presents the analysis, design and implementation of a single-phase high power factor boost rectifier composed of power cells in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by a Field Programmable Gate Array (FPGA) device. Zero-Current-Switching (ZCS) cells are used to provide conditions for non-dissipative commutations during the switches' and boost diodes' turn-on and turn-off. The ZCS cells operate at the boundary of continuous and discontinuous modes, designated as critical conduction mode, eliminating the disadvantages related recovery effects of boost diodes operated in continuous conduction mode, namely: additional losses, and electromagnetic interference (EMI) problems. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage high-frequency ripple, and the use of semiconductor devices with lower breakdown voltages and forward currents, low volume for the EMI input filter, high input power factor, and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using the XC2S200E-SpartanII-E/Xilinx FPGA device. Theoretical analyses, modeling for digital control, design methodologies and examples are presented. Laboratorial prototypes were implemented in order to provide the validation of proposed converter. Additionally, the experimental results are obtained from prototypes composed of two and four interleaved cells, rated at 1kW and 2kW, respectively.
Descrição
Palavras-chave
Conversores de corrente eletrica, Eletronica de potencia, Fator de potencia, Retificadores de semicondutores, Sistemas de controle digital
Como citar
GONÇALVES, Flávio Alessandro Serrão. Pré-regulador retificador entrelaçado (Interleaved) ZCS-FM boost, com controle digital através de dispositivo FPGA e linguagem VHDL. 2005. xxxiii, 242 f. Tese (doutorado) - Universidade Estadual Paulista, Faculdade de Engenharia de Ilha Solteira, 2005.