A configurable approach to circuit simulation
Nenhuma Miniatura disponível
Data
2000-01-01
Autores
Orientador
Coorientador
Pós-graduação
Curso de graduação
Título da Revista
ISSN da Revista
Título de Volume
Editor
C S R E A Press
Tipo
Trabalho apresentado em evento
Direito de acesso
Acesso aberto
Resumo
This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.
Descrição
Palavras-chave
Idioma
Inglês
Como citar
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, Vols I-v. Athens: C S R E A Press, p. 1539-1544, 2000.
