Design of operational transconductance amplifier with Gate-All-Around Nanosheet MOSFET using experimental data from room temperature to 200 °C
dc.contributor.author | Sousa, Júlia C.S. | |
dc.contributor.author | Perina, Welder F. | |
dc.contributor.author | Rangel, Roberto | |
dc.contributor.author | Simoen, Eddy | |
dc.contributor.author | Veloso, Anabela | |
dc.contributor.author | Martino, Joao A. | |
dc.contributor.author | Agopian, Paula G.D. [UNESP] | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | University of Toronto | |
dc.contributor.institution | imec | |
dc.contributor.institution | Universidade Estadual Paulista (UNESP) | |
dc.date.accessioned | 2022-04-28T19:49:41Z | |
dc.date.available | 2022-04-28T19:49:41Z | |
dc.date.issued | 2022-03-01 | |
dc.description.abstract | In this work, a Gate-All-Around Nanosheet transistor (GAA-NSH) is used to design an operational transconductance amplifier (OTA) operating from room temperature to 200 °C. A simulation model for the transistor was created using Verilog A language including a lookup table (LUT) with current response and capacitance data obtained from measurement of fabricated devices. Two OTA designs were made, for supply voltages (VDD) of 2.1 V and 1.5 V. The first design was analyzed at room temperature (25 °C) with different bias points that defined the transistors efficiency (gm/ID) of the first stage input differential pair and current mirror load. A comparison with other OTA projects using FinFET and Tunnel FET (TFET) devices was performed considering similar gm/ID for all designs. The GAA-NSH design presents a larger voltage gain than the FinFET design (71.8 dB vs. 67.6 dB), while consuming less power (544.5uW vs. 1.41mW) and utilizing smaller devices and an overall smaller area footprint. Improvements are a consequence of the superior gate electrostatic coupling of the GAA-NSH transistors that can be seen through the improved transconductance and output conductance values. Compared with the TFET device, the GAA-NSH presents a tradeoff between Bandwidth and power consumption. Finally, the second OTA designed is analyzed from room temperature to 200 °C, and a decrease of the voltage gain and GBW was observed due to the mobility degradation at high temperature. | en |
dc.description.affiliation | LSI/PSI/USP University of Sao Paulo | |
dc.description.affiliation | ECE University of Toronto | |
dc.description.affiliation | imec | |
dc.description.affiliation | UNESP Sao Paulo State University | |
dc.description.affiliationUnesp | UNESP Sao Paulo State University | |
dc.identifier | http://dx.doi.org/10.1016/j.sse.2022.108238 | |
dc.identifier.citation | Solid-State Electronics, v. 189. | |
dc.identifier.doi | 10.1016/j.sse.2022.108238 | |
dc.identifier.issn | 0038-1101 | |
dc.identifier.scopus | 2-s2.0-85123056786 | |
dc.identifier.uri | http://hdl.handle.net/11449/223281 | |
dc.language.iso | eng | |
dc.relation.ispartof | Solid-State Electronics | |
dc.source | Scopus | |
dc.subject | Analog Circuit Design | |
dc.subject | Gate-All-Around Nanosheet (GAA-NSH) | |
dc.subject | Lookup table | |
dc.subject | Operational transconductance amplifier | |
dc.subject | Transistor efficiency (gm/ID) | |
dc.title | Design of operational transconductance amplifier with Gate-All-Around Nanosheet MOSFET using experimental data from room temperature to 200 °C | en |
dc.type | Artigo |