Design of operational transconductance amplifier with Gate-All-Around Nanosheet MOSFET using experimental data from room temperature to 200 °C

dc.contributor.authorSousa, Júlia C.S.
dc.contributor.authorPerina, Welder F.
dc.contributor.authorRangel, Roberto
dc.contributor.authorSimoen, Eddy
dc.contributor.authorVeloso, Anabela
dc.contributor.authorMartino, Joao A.
dc.contributor.authorAgopian, Paula G.D. [UNESP]
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversity of Toronto
dc.contributor.institutionimec
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)
dc.date.accessioned2022-04-28T19:49:41Z
dc.date.available2022-04-28T19:49:41Z
dc.date.issued2022-03-01
dc.description.abstractIn this work, a Gate-All-Around Nanosheet transistor (GAA-NSH) is used to design an operational transconductance amplifier (OTA) operating from room temperature to 200 °C. A simulation model for the transistor was created using Verilog A language including a lookup table (LUT) with current response and capacitance data obtained from measurement of fabricated devices. Two OTA designs were made, for supply voltages (VDD) of 2.1 V and 1.5 V. The first design was analyzed at room temperature (25 °C) with different bias points that defined the transistors efficiency (gm/ID) of the first stage input differential pair and current mirror load. A comparison with other OTA projects using FinFET and Tunnel FET (TFET) devices was performed considering similar gm/ID for all designs. The GAA-NSH design presents a larger voltage gain than the FinFET design (71.8 dB vs. 67.6 dB), while consuming less power (544.5uW vs. 1.41mW) and utilizing smaller devices and an overall smaller area footprint. Improvements are a consequence of the superior gate electrostatic coupling of the GAA-NSH transistors that can be seen through the improved transconductance and output conductance values. Compared with the TFET device, the GAA-NSH presents a tradeoff between Bandwidth and power consumption. Finally, the second OTA designed is analyzed from room temperature to 200 °C, and a decrease of the voltage gain and GBW was observed due to the mobility degradation at high temperature.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationECE University of Toronto
dc.description.affiliationimec
dc.description.affiliationUNESP Sao Paulo State University
dc.description.affiliationUnespUNESP Sao Paulo State University
dc.identifierhttp://dx.doi.org/10.1016/j.sse.2022.108238
dc.identifier.citationSolid-State Electronics, v. 189.
dc.identifier.doi10.1016/j.sse.2022.108238
dc.identifier.issn0038-1101
dc.identifier.scopus2-s2.0-85123056786
dc.identifier.urihttp://hdl.handle.net/11449/223281
dc.language.isoeng
dc.relation.ispartofSolid-State Electronics
dc.sourceScopus
dc.subjectAnalog Circuit Design
dc.subjectGate-All-Around Nanosheet (GAA-NSH)
dc.subjectLookup table
dc.subjectOperational transconductance amplifier
dc.subjectTransistor efficiency (gm/ID)
dc.titleDesign of operational transconductance amplifier with Gate-All-Around Nanosheet MOSFET using experimental data from room temperature to 200 °Cen
dc.typeArtigo

Arquivos

Coleções