Determining the interfacial density of states in metal-insulator- semiconductor devices based on poly(3-hexylthiophene) N. Alves and D. M. Taylor Citation: Appl. Phys. Lett. 92, 103312 (2008); doi: 10.1063/1.2897238 View online: http://dx.doi.org/10.1063/1.2897238 View Table of Contents: http://apl.aip.org/resource/1/APPLAB/v92/i10 Published by the AIP Publishing LLC. Additional information on Appl. Phys. Lett. Journal Homepage: http://apl.aip.org/ Journal Information: http://apl.aip.org/about/about_the_journal Top downloads: http://apl.aip.org/features/most_downloaded Information for Authors: http://apl.aip.org/authors Downloaded 11 Jul 2013 to 200.145.3.34. This article is copyrighted as indicated in the abstract. Reuse of AIP content is subject to the terms at: http://apl.aip.org/about/rights_and_permissions http://apl.aip.org/?ver=pdfcov http://oasc12039.247realmedia.com/RealMedia/ads/click_lx.ads/www.aip.org/pt/adcenter/pdfcover_test/L-37/2074845429/x01/AIP-PT/APL_PDFCoverPg_061913/FreeContentHand_1640x440.jpg/6c527a6a7131454a5049734141754f37?x http://apl.aip.org/search?sortby=newestdate&q=&searchzone=2&searchtype=searchin&faceted=faceted&key=AIP_ALL&possible1=N. Alves&possible1zone=author&alias=&displayid=AIP&ver=pdfcov http://apl.aip.org/search?sortby=newestdate&q=&searchzone=2&searchtype=searchin&faceted=faceted&key=AIP_ALL&possible1=D. M. Taylor&possible1zone=author&alias=&displayid=AIP&ver=pdfcov http://apl.aip.org/?ver=pdfcov http://link.aip.org/link/doi/10.1063/1.2897238?ver=pdfcov http://apl.aip.org/resource/1/APPLAB/v92/i10?ver=pdfcov http://www.aip.org/?ver=pdfcov http://apl.aip.org/?ver=pdfcov http://apl.aip.org/about/about_the_journal?ver=pdfcov http://apl.aip.org/features/most_downloaded?ver=pdfcov http://apl.aip.org/authors?ver=pdfcov Determining the interfacial density of states in metal-insulator- semiconductor devices based on poly„3-hexylthiophene… N. Alvesa� and D. M. Taylorb� School of Electronic Engineering, Bangor University, Dean Street, Bangor, Gwynedd LL57 1UT, United Kingdom �Received 10 January 2008; accepted 22 February 2008; published online 13 March 2008� Low frequency admittance measurements are used to determine the density of interface states in metal-insulator-semiconductor diodes based on the unintentionally doped, p-type semiconductor poly�3-hexylthiophene�. After vacuum annealing at 90 °C, interface hole trapping states are shown to be distributed in energy with their density decreasing approximately linearly from �20 �1010 to 5�1010 cm−2 eV−1 over an energy range extending from 0.05 to 0.25 eV above the bulk Fermi level. © 2008 American Institute of Physics. �DOI: 10.1063/1.2897238� It is well known that trapping states located at the inter- face between the semiconductor and insulator can cause in- stabilities in the threshold voltage of metal-oxide- semiconductor devices based on crystalline, polycrystalline, and amorphous silicon. Small-signal admittance measure- ments have proved particularly useful for studying such states in silicon devices1 and we have demonstrated2,3 that similar measurements can be used for investigating interface states in organic metal-insulator-semiconductor �MIS� de- vices based on the p-type semiconductor poly�3- hexylthiophene� �P3HT�. While there is some evidence3 that the density of hole-trapping interface states decreases with increasing energy above the highest occupied molecular or- bital of P3HT, a detailed investigation of the energetic dis- tribution of such states has not yet been reported. In this contribution, we use the conductance method, initially advo- cated by Nicollian and Goetzberger �NG�,1 to reveal the den- sity of states for the hole traps present at the interface be- tween P3HT and the spin-on-glass polysilsesquioxane �PSQ�. For the study, we fabricated MIS capacitors on indium tin oxide �ITO� coated glass slides following our previously described procedures.3 The PSQ gate insulator,�300 nm thick, was prepared by spin coating and thermally curing at 450 °C a precursor silsesquioxane �90% phenyl and 10% methyl content dissolved in butanone, Gelest Inc.�. After cooling, the PSQ was treated with hexamethyldisilazane to render the surface hydrophobic. Subsequently, �100 nm thick film of P3HT �Sigma-Aldrich Ltd.� was spin coated onto the insulator. The device was completed by evaporating a 50 nm thick gold electrode, 1 mm in diameter and sur- rounded by a guard ring. After preparation, the devices were heated under vacuum at 90 °C for several hours to remove adventitious dopants, e.g., atmospheric oxygen, from the P3HT. Measurements were then made at 30 °C using an im- pedance analyzer �Solartron Model 1255 with Dielectric In- terface Model 1296�. Bias and signal voltages were applied to the ITO electrode, with the detection circuitry connected to the gold electrode with the guard ring grounded. Figure 1 shows the measured capacitance and loss �conductance/angular frequency� plotted as a function of bias voltage for frequencies in the range of 1 Hz–2.5 kHz. Al- though data was obtained by incrementing at 5 steps/decade, for clarity, data for only six frequencies are shown. The C-V plots demonstrate the changing conditions in the device from accumulation �negative voltages� to complete depletion of the semiconductor �V� �2 V�. Above �600 Hz, the ca- pacitance measured in accumulation �negative voltages� be- gan to decrease rapidly signifying the onset of the well-documented3 limitation on charge transport in the bulk semiconductor which gives rise to the classic Maxwell– Wagner relaxation characteristic of two dissimilar dielectric layers.4 The “stretching” of the C-V plots at lower frequen- cies provides good evidence for the presence of interface a�Permanent Address: Faculdade de Ciências e Tecnologia, UNESP, CP 467, 19060-900, Presidente Prudente, SP, Brazil. b�Electronic mail: d.m.taylor@bangor.ac.uk. FIG. 1. �a� Capacitance and �b� loss �conductance/angular frequency� vs voltage plots obtained at six different frequencies in the range of 1 Hz–2.5 kHz for P3HT MIS diodes at 30 °C. The sharp rise in loss at 1 Hz for negative voltages arises from insulator leakage. APPLIED PHYSICS LETTERS 92, 103312 �2008� 0003-6951/2008/92�10�/103312/3/$23.00 © 2008 American Institute of Physics92, 103312-1 Downloaded 11 Jul 2013 to 200.145.3.34. This article is copyrighted as indicated in the abstract. Reuse of AIP content is subject to the terms at: http://apl.aip.org/about/rights_and_permissions http://dx.doi.org/10.1063/1.2897238 http://dx.doi.org/10.1063/1.2897238 http://dx.doi.org/10.1063/1.2897238 states.5 Loss maxima �Fig. 1�b�� increasing in magnitude and shifting to lower voltages as frequency increases, indicate that these states are distributed in energy.1 Although using a guard ring may give rise to similar behavior,6 this can be ruled out here since the loss peaks occur when the device is well into depletion. In contrast to the loss plots �Fig. 1�b��, which are much more sensitive to the presence of interface states, little change is seen in the slope of the C-V plot between 631 Hz and 1 kHz. Therefore, since the stretching effect of the inter- face states is negligible in this range, the gradient of the Mott–Schottky plot,7 i.e., C−2 versus V, corresponding to 631 Hz was used to deduce the acceptor doping density, Na=2�1016 cm−3, in the bulk semiconductor. To extract the energetic distribution of the interface states from the loss data, we follow the NG analysis1 which is based on Shockley–Read–Hall statistics and a time- varying Fermi level resulting from the applied small-signal voltage. For a p-type semiconductor, the majority hole con- centration at the interface greatly exceeds the electron con- centration so we need consider only the interaction of holes with interface states �Fig. 2�a��. Although developed for crystalline silicon, the model makes no appeal to any specific density of states distribution in the semiconductor,8 so that the approach is more generally valid and can be applied, for example, to a semiconductor in which the density of localised, bulk hole states, g�E�, de- creases exponentially with energy E into the bandgap,9 i.e., g�E� = N kT0 exp − E kT0 �0 � E � � � , �1� where N is the total number of states per unit volume, k is Boltzmann’s constant, and T0 is a parameter characterizing the distribution. These valence “tail” states are shown dotted in Fig. 2�b�. Of interest here is that the fraction �S of these bulk states occupied at the interface depends on the gate- induced potential VS at the semiconductor surface in the same way �except for the temperature dependence� as in the band model,9 i.e., �S = �0 exp − qVS kT0 , �2� where �0 is the fraction of states occupied by holes well away from the interface. The small-signal hole current flow- ing between the occupied bulk states and interface trap states is then calculated as the difference between the hole emis- sion and capture rates by the traps, and leads to a complex admittance, YS = j� q2 kT Nitf0�1 − f0� �1 + j��1 − f0�/cpps0� , �3� where j=�−1, � the angular frequency of the small signal, q the electronic charge, Nit the density of interface states per unit area, k Boltzmann’s constant, T the absolute tempera- ture, and f0 and ps the Fermi function and hole concentration, respectively, established at the semiconductor surface by the bias voltage. For an organic semiconductor, the capture prob- ability cp is averaged over the tail states �Fig. 2�b��. In the equivalent circuit in Fig. 2�c�, YS describes1 the series combination of Rit and Cit which has a time constant �=RitCit= �1− f0� /cpps0 and in which Cit = q2 kT Nitf0�1 − f0� . �4� The other elements in this circuit represent the capacitance CB and resistance RB of the bulk semiconductor, and CI and CD the capacitances of the insulator and depletion region, respectively. Transforming the interface state response from the series to a parallel representation and including the deple- tion capacitance yields expressions for the equivalent parallel capacitance CP and conductance GP for the middle section of the equivalent circuit, i.e., CP = CD + Cit 1 + �2�2 �5� and GP � = Cit�� 1 + �2�2 . �6� In the presence of a distribution of interface states, then, additional RC elements �shown dotted in Fig. 2�c�� must be included to represent each additional level. For a continuum of interface states, Eq. �6� is then replaced1 by GP � = qDit 2�� ln�1 + �2�2� , �7� where Dit is the density of interface states per unit area per eV. Following NG,1 CP and GP may be evaluated from the measured capacitance and loss by correcting for the reac- tance of the insulator so long as conductance losses in the bulk semiconductor are negligible, i.e., well below the Maxwell–Wagner relaxation of the device. Figure 1�b� shows that this condition holds only for frequencies up to �100 Hz. �In silicon devices, the limiting frequency is �1 MHz owing to the higher carrier mobilities�. When the device is in accu- mulation, bulk conduction losses in the semiconductor in- crease and distort the interface loss peak above �100 Hz. In FIG. 2. Energy diagrams showing the interaction of holes with an interface state in �a� silicon and �b� a semiconductor with localized states extending into the bandgap. �c� Equivalent circuit representation of a MIS device with interface states biased into depletion. 103312-2 N. Alves and D. M. Taylor Appl. Phys. Lett. 92, 103312 �2008� Downloaded 11 Jul 2013 to 200.145.3.34. This article is copyrighted as indicated in the abstract. Reuse of AIP content is subject to the terms at: http://apl.aip.org/about/rights_and_permissions depletion, additional parasitic losses cause further distortion above �1 kHz. A first order correction can be made up to �400 Hz by subtracting the bulk contribution to the loss, i.e., the plateau value in accumulation and an approximately linearly deceasing contribution throughout the depletion region6 �this approach becomes increasingly tenuous at higher frequencies as terms involving products of the various elements become more significant�. The resulting plots, based on data obtained at all test frequencies up to 398 Hz are shown in Fig. 3. Since the behavior is characteristic of a distribution of interface states, the maximum loss occurs when ��=1.9,1 which upon substituting into Eq. �7� leads directly to an estimate of Dit, the density of interface traps being “interrogated” at the applied voltage corresponding to the maximum loss. The energy Eit of these states is readily determined from knowledge of the band bending VS induced by the applied voltage. Hence, applying the Poisson equation to the deple- tion region yields Vs = Eit − EFb = qNA 0A2 2 · 1 Cd 2 , �8� where EFb is the bulk semiconductor Fermi level and Cd is calculated at the appropriate voltage by assuming that at 631 Hz interface and bulk semiconductor losses are small so that the measured capacitance is the series sum of depletion and insulator capacitances. The results of the analysis are given in Fig. 4 from which it is seen that the density of interface hole trapping states decreases approximately linearly from �20�1010 to 5 �1010 cm−2 eV−1 in the energy range of 0.05� �Eit.−EFb� �0.25 V. Probing deeper into the bandgap will require mea- surements to be extended below 1 Hz and working with thicker semiconductor films in order to achieve the necessary degree of band bending. Assigning an absolute value to the trap energies requires an independent measurement of EFb. In conclusion, we have shown that admittance measure- ments provide a practical way forward for measuring the density of interface states in organic MIS devices based on p-doped semiconductors such as P3HT. Hence, the founda- tions have been established for undertaking a systematic study of the effects of processing conditions, aging etc on the interface properties of such devices. The authors thank Dr. D. L. John for valuable discus- sions and the Engineering and Physical Sciences Research Council, UK �Grant No. GR/S97040/01�, CAPES, Brazil and the Higher Education Funding Council for Wales for finan- cial support. 1E. H. Nicollian and A. Goetzberger, Bell Syst. Tech. J. 46, 1055 �1967�. 2I. Torres, D. M. Taylor, and E. Itoh, Appl. Phys. Lett. 85, 314 �2004�. 3I. Torres and D. M. Taylor, J. Appl. Phys. 98, 073710 �2005�. 4A. von Hippel, Dielectrics and Waves �Wiley, New York, 1954�, p. 228. 5S. M. Sze, Physics of Semiconductor Devices, 2nd ed. �Wiley Interscience, New York, 1981�, p. 382. 6D. M. Taylor and N. Alves, J. Appl. Phys. 103, 054509 �2008�. 7C. G. M. Fonstad, Microelectronic Devices and Circuits, International Edition �McGraw-Hill, New York, 1994�, p. 254. 8E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Phys- ics and Technology �Wiley Interscience, New York, 2003�, p. 830. 9M. J. C. M. Vissenberg and M. Matters, Phys. Rev. B 57, 12964 �1998�. FIG. 3. Interface trap loss, GP /�, extracted from measured loss data and plotted as a function of applied voltage. Here, the data sets obtained at all frequencies up to 398 Hz are shown. FIG. 4. Density of hole traps Dit at the P3HT/polysilsesquioxane interface plotted as a function of energy above the bulk Fermi level EFb. 103312-3 N. Alves and D. M. Taylor Appl. Phys. Lett. 92, 103312 �2008� Downloaded 11 Jul 2013 to 200.145.3.34. This article is copyrighted as indicated in the abstract. Reuse of AIP content is subject to the terms at: http://apl.aip.org/about/rights_and_permissions http://dx.doi.org/10.1063/1.1769081 http://dx.doi.org/10.1063/1.2081109