Operational Transconductance Amplifier Design with Gate-All-Around Nanosheet MOSFET using Experimental Lookup Table Approach - Sousa, Julia C. S.; Perina, Welder F.; Simoen, Eddy; Veloso, Anabela; Martino, Joao A.; Agopian, Paula G. D. [UNESP] (Institute of Electrical and Electronics Engineers (IEEE), 2021)
This paper presents the design of an Operational Transconductance Amplifier (OTA) with Gate-All-Around Nanosheet MOSFETs (GAA-NSH). The circuit simulation was performed using an experimental Lookup Table (LUT) approach. The experimental drain current and gate capacitance were extracted and used in a Verilog-A model in order to design the OTA for different transistor efficiency (gm/ID) values. The results present a compromise between power consumption (PC), voltage gain (AV) and the Gain-Bandwidth-Product (GBW). For gm/ID of 8 V-1 an AV of 71.8 dB is obtained for a GBW of 361.3 MHz. These results were compared with other OTA designs using FinFET and TFET devices. The NSH OTA presents higher GBW, and considering the Av and PC, while NSH present better behavior than FinFETs, the behavior is worse than TFET OTA circuit for strong inversion operation.
Keywords: Analog Circuit Design; Lookup Table; Nanosheet (NSH); Operational Transconductance Amplifier; Transistor Efficiency (gm/ID)