Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications

Dos Santos, Rodrigo Bispo [UNESP]Rizol, Paloma M. S. Rocha [UNESP]Mesquita, Leonardo [UNESP]2018-12-112018-12-112015-01-012015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings.http://hdl.handle.net/11449/177557The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35μm technology through Pspice software using a single supply voltage of 1.8V.engInterval type-2 fuzzy logic controllerMultiplier/dividerType-2 fuzzy logicDesign of CMOS current-mode multiplier-divider circuit for type-2 FLC applicationsTrabalho apresentado em evento10.1109/LASCAS.2015.7250476Acesso restrito2-s2.0-84945156769918663258617772693380794474643410000-0001-5246-4438