Arenas, Luis De Oro [UNESP]Melo, Guilherme A. e [UNESP]Canesin, Carlos A. [UNESP]IEEE2018-11-262018-11-262017-01-012017 Xiv Brazilian Power Electronics Conference (cobep). New York: Ieee, 6 p., 2017.2175-8603http://hdl.handle.net/11449/164007This paper proposes an electric power measurement implementation by using an FPGA (Field Programmable Gate Arrays) device, based on the power calculation theory defined by the IEEE 1459-2010 Standard. The modules synthesized in the programmable logic device (PLD) are fully developed in a hardware description language (HDL), allowing the control over all variables and signals present in the system. This methodology attends the windowing specifications established by the NBR IEC 61000-4-30:2011 Standard for power quality measurement methods. Finally, the hardware structure described in the FPGA and the developed analog signal conditioning platform are presented along with experimental results for three-phase power systems in several scenarios.6engFPGA DevicesIEEE 1459-2010Power MeasurementPower QualitySmart MetersTrabalho apresentado em eventoWOS:000427956700156Acesso aberto