Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications

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Data

2015-01-01

Autores

Santos, Rodrigo Bispo dos [UNESP]
Rocha Rizol, Paloma M. S. [UNESP]
Mesquita, Leonardo [UNESP]
Arnaud, A.
Silveira, F.
Garcia, L.

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Título de Volume

Editor

Ieee

Resumo

The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V.

Descrição

Palavras-chave

component, Multiplier/divider, Type-2 fuzzy logic, Interval type-2 fuzzy logic controller

Como citar

2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, 4 p., 2015.