Silicon Nanowire Tunnel-FET Differential Amplifier Using Verilog-A Lookup Table Approach
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Data
2019-01-01
Autores
Nogueira, Alexandro de M.
Agopian, Paula G. D. [UNESP]
Martino, Joao A.
IEEE
Título da Revista
ISSN da Revista
Título de Volume
Editor
Ieee
Resumo
Electrical characterization of a silicon nanowire Tunnel Field Effect Transistor (TFET) is used to construct a lookup table in order to model and simulate analog circuit through Verilog-A approach. The performance of a differential amplifier with current mirror load is evaluated using the TFET lookup table model and the TSMC 130 nm CMOS process design kit. Both circuits are evaluated in two different bias, with the TFET circuit presenting 20 dB higher voltage gain and power consumption of at least three orders of magnitude smaller than CMOS technology. All the simulations were realized with Cadence Spectre software.
Descrição
Palavras-chave
TFET, nanowire, lookup table, differential amplifier, circuit simulation
Como citar
2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019). New York: Ieee, 4 p., 2019.