Design of a reconfigurable pseudorandom number generator for use in intelligent systems

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dc.contributor.authorde Oliveira, Tiago
dc.contributor.authorMarranghello, Norian [UNESP]
dc.contributor.institutionUniversidade Federal de São Paulo (UNIFESP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2014-05-20T14:01:42Z
dc.date.available2014-05-20T14:01:42Z
dc.date.issued2011-05-01
dc.description.abstractThis paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the following five linear generator algorithms: a multiplicative congruential, a mixed congruential, a standard multiple recursive, a mixed multiple recursive, and a multiply-with-carry. The generation unit can be used both as a pseudorandom and a message passing-based server, which is able to produce pseudorandom numbers on demand, sending them to the network-on-chip blocks that originate the service request. The generator architecture has been mapped to a field programmable gate array, and showed that millions of numbers in 32-, 64-, 96-, or 128-bit formats can be produced in tens of milliseconds. (C) 2011 Elsevier B.V. All rights reserved.en
dc.description.affiliationUniv Fed São Paulo, Dept Sci & Technol, BR-12231280 Sao Jose Dos Campos, SP, Brazil
dc.description.affiliationSão Paulo State Univ, Dept Comp Sci, BR-15054000 Sao Jose do Rio Preto, SP, Brazil
dc.description.affiliationUnespSão Paulo State Univ, Dept Comp Sci, BR-15054000 Sao Jose do Rio Preto, SP, Brazil
dc.format.extent1510-1519
dc.identifierhttp://dx.doi.org/10.1016/j.neucom.2010.12.021
dc.identifier.citationNeurocomputing. Amsterdam: Elsevier B.V., v. 74, n. 10, p. 1510-1519, 2011.
dc.identifier.doi10.1016/j.neucom.2010.12.021
dc.identifier.issn0925-2312
dc.identifier.lattes2098623262892719
dc.identifier.orcid0000-0003-1086-3312
dc.identifier.urihttp://hdl.handle.net/11449/21777
dc.identifier.wosWOS:000290838600002
dc.language.isoeng
dc.publisherElsevier B.V.
dc.relation.ispartofNeurocomputing
dc.relation.ispartofjcr3.241
dc.relation.ispartofsjr1,073
dc.rights.accessRightsAcesso restrito
dc.sourceWeb of Science
dc.subjectPseudorandom number generationen
dc.subjectIntelligent systemsen
dc.subjectReconfigurable architecturesen
dc.subjectNetwork-on-chipen
dc.titleDesign of a reconfigurable pseudorandom number generator for use in intelligent systemsen
dc.typeArtigo
dcterms.licensehttp://www.elsevier.com/about/open-access/open-access-policies/article-posting-policy
dcterms.rightsHolderElsevier B.V.
unesp.author.lattes2098623262892719[2]
unesp.author.orcid0000-0003-1086-3312[2]
unesp.campusUniversidade Estadual Paulista (Unesp), Instituto de Biociências Letras e Ciências Exatas, São José do Rio Pretopt

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