Analog behavior of forksheet FET at high temperatures

Abstract

This work presents an experimental study of the analog behavior of forksheet FET from room up to 150 °C with channel lengths of 26 and 70 nm. These devices present a Zero Temperature-Coefficient (ZTC) point for a gate voltage around 0,59 V (VZTC) in saturation region. The threshold voltage variation with temperature (dVT/dT) is around −0,5mV/oC due to the Fermi level decrease. The DIBL increases with temperature but it is kept lower than 51 mV/V in the studied temperature range. The transconductance and output conductance decrease (mainly due the mobility degradation) which results in a good intrinsic voltage gain of around 36 dB at room temperature, showing a slight change (±2dB) in the studied temperature range. The maximum unity gain frequency estimated for L = 26 nm is around 358 GHz in strong inversion regime. The results show that the forksheet FETs present a good performance for analog applications at high temperature, which in addition to the already known savings in footprint area compared to nanosheet technology, are potentially useful for future mixed-signal integrated circuits.