The High Temperature Impact on Operational Transconductance Amplifier Designed with Forksheet Experimental Data

Abstract

This paper presents the impact of high temperature on the performance of an Operational Transconductance Amplifier (OTA) with a Verilog A simulation designed with forksheet transistors experimental data. An n-type forksheet with two fins and two sheets per fin with silicon thickness (Hfs) of 7 nm, silicon width ($\mathrm{W}_{\text{FS}}$) of 23 nm and a designed gate length ($\mathrm{L}_{\mathrm{G}}$) of 70 nm was electrically characterized to create a Verilog A model to be used in the OTA design within Cadence Virtuoso. When the temperature increases from 25 to 150 ° C, the transistor efficiency ($\mathrm{g}_{\mathrm{m}}/\mathrm{I}_{\mathrm{D}}$) decreases about 10% from the designed value of 8 V−1, due to carrier mobility degradation. This led to a correspondent 48% decrease in the voltage gain (Av) from 695 to 360 V/V and also a 13% degradation in the circuit's GBW from 263 to 230 MHz. Nevertheless, the circuit did not present a significant variation in power consumption or loss of stability. These results indicate that a forksheet-based analog or mixedsignal circuit is capable of retaining a solid performance even when the devices are exposed to a high temperature, highlighting its potential for application in future technologies.