Consumo de energia em escalonadores de transações em sistemas de memória transacional em software
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Data
2016-04-28
Autores
Marques Junior, Ademir [UNESP]
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Editor
Universidade Estadual Paulista (Unesp)
Resumo
O conceito de Memória Transacional foi criado para simplificar a sincronização de dados em memória, necessária para evitar a computação de dados inconsistentes por processadores multinúcleos, que se tornaram padrão devido às limitações encontradas em processadores de um núcleo. Em evolução constante pela busca de desempenho, os escalonadores de transação foram criados como alternativa aos gerenciadores de contenção presentes nos Sistemas de Memória Transacional. O consumo de energia é preocupação crescente, desde os grandes data centers até os disposítivos móveis que dependem de tempo de bateria, sendo também explorado no contexto de sistemas com Memória Transacional. Trabalhos anteriores consideraram, em sua maioria, somente o uso de gerenciadores de contenção, sendo o objetivo deste trabalho uma análise sobre o uso de escalonadores de transação. Desta forma, são exploradas nesta dissertação as técnicas de escalonamento dinâmico de tensão e frequência (DVFS) para a criação de uma heurística para a redução do consumo de energia utilizando o escalonador LUTS como base. Com o uso de aplicações do benchmark STAMP e biblioteca de memória transacional TinySTM, este trabalho faz uma análise sobre a eficiência energética dos escalonadores de referência ATS e LUTS, enquanto propõe uma nova heurística com o objetivo de reduzir o consumo de energia, denominada LUTSDynamic-Serializer, que alterna entre o uso de spinlock e de trava mutex de forma dinâmica. O uso desta heurística reduziu o EDP em até 17% e 61% em valores de EDP (Eenergy-Delay Product), e 4,95% e 15,8% na média geométrica das aplicações estudadas, em comparação aos escalonadores LUTS e ATS respectivamente, quando se utilizou a configuração de 8 threads, que é a limitação física de threads do processador utilizado no ambiente de experimento.
The Transactional Memory concept was created to simplify the synchronization of data in memory, needed to avoid computation of inconsistent data in multicore processors, which became standard due to limitations in single core processors. In constant search for performance, transactional schedulers were created as a alternative to contention managers present in transactional memory systems. The energy consumption is a crescent worry, ranging from big data centers to mobile devices which are dependent on battery life, and also being studied in Transactional Memory systems. Past works only considered the use of contention managers, and therefore this work seeks to analyse the impact of transactional schedulers. The techniques involving Dynamic Frequency-Voltage Scaling (DVFS) were explored with the motivation to create a heuristic to reduce energy consumption using the LUTS scheduler as a start. Utilizing the STAMP benchmark and the TinySTM transactional memory library, this work does an analysis about the energy efficiency of the reference scheduler ATS and LUTS, while proposing a new heuristic, named LUTSDynamic-Serializer, with the aim to reduce energy consumption by making a choice between spin-lock and mutex lock in a dynamic manner. We achieve with our heuristic up to 17% and 61% in EDP (Energy-Delay Product), and 4,95% and 15,8% considering the geometric mean among the applications studied, compared against the schedulers LUTS and ATS respectively, when we used the configuration with 8 threads, which is the physical limit of threads in the processor used in the experiments.
The Transactional Memory concept was created to simplify the synchronization of data in memory, needed to avoid computation of inconsistent data in multicore processors, which became standard due to limitations in single core processors. In constant search for performance, transactional schedulers were created as a alternative to contention managers present in transactional memory systems. The energy consumption is a crescent worry, ranging from big data centers to mobile devices which are dependent on battery life, and also being studied in Transactional Memory systems. Past works only considered the use of contention managers, and therefore this work seeks to analyse the impact of transactional schedulers. The techniques involving Dynamic Frequency-Voltage Scaling (DVFS) were explored with the motivation to create a heuristic to reduce energy consumption using the LUTS scheduler as a start. Utilizing the STAMP benchmark and the TinySTM transactional memory library, this work does an analysis about the energy efficiency of the reference scheduler ATS and LUTS, while proposing a new heuristic, named LUTSDynamic-Serializer, with the aim to reduce energy consumption by making a choice between spin-lock and mutex lock in a dynamic manner. We achieve with our heuristic up to 17% and 61% in EDP (Energy-Delay Product), and 4,95% and 15,8% considering the geometric mean among the applications studied, compared against the schedulers LUTS and ATS respectively, when we used the configuration with 8 threads, which is the physical limit of threads in the processor used in the experiments.
Descrição
Palavras-chave
Memória transacional, Escalonadores, Consumo de energia, Transactional memoy, Schedulers, Energy consumption