Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications

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dc.contributor.authorDos Santos, Rodrigo Bispo [UNESP]
dc.contributor.authorRizol, Paloma M. S. Rocha [UNESP]
dc.contributor.authorMesquita, Leonardo [UNESP]
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2018-12-11T17:25:58Z
dc.date.available2018-12-11T17:25:58Z
dc.date.issued2015-01-01
dc.description.abstractThe design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35μm technology through Pspice software using a single supply voltage of 1.8V.en
dc.description.affiliationUNESP. Univ. Estadual Paulista
dc.description.affiliationUnespUNESP. Univ. Estadual Paulista
dc.identifierhttp://dx.doi.org/10.1109/LASCAS.2015.7250476
dc.identifier.citation2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings.
dc.identifier.doi10.1109/LASCAS.2015.7250476
dc.identifier.lattes9186632586177726
dc.identifier.lattes9338079447464341
dc.identifier.orcid0000-0001-5246-4438
dc.identifier.scopus2-s2.0-84945156769
dc.identifier.urihttp://hdl.handle.net/11449/177557
dc.language.isoeng
dc.relation.ispartof2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings
dc.rights.accessRightsAcesso restrito
dc.sourceScopus
dc.subjectInterval type-2 fuzzy logic controller
dc.subjectMultiplier/divider
dc.subjectType-2 fuzzy logic
dc.titleDesign of CMOS current-mode multiplier-divider circuit for type-2 FLC applicationsen
dc.typeTrabalho apresentado em evento
unesp.advisor.lattes9338079447464341[3]
unesp.author.lattes9186632586177726[2]
unesp.author.orcid0000-0001-5246-4438[2]

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