Publicação: Performance evaluation of Tunnel-FET basic amplifier circuits
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Coorientador
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Editor
Ieee
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Trabalho apresentado em evento
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Acesso aberto
Resumo
This work analyzes the performance of measured Tunneling Field-Effect Transistors (TFET) when applied to analog circuits. The method uses a look-up table based behavioral model, taking the experimental results from a fabricated silicon pTFET as input. The Verilog-A behavioral language is used to implement the TFET model, enabling the use with spice-like simulators along with passive and active elements, achieving bigger circuits than other implementations involving numerical multiphysics simulation of the device. The model is further incremented with device capacitances, and the response of analog circuits is considered. An Operational Transconductance Amplifier (OTA) is presented, showing near 130 dB open-loop gain and 18.9nW power consumption.
Descrição
Palavras-chave
TFET, Circuit Simulation, Verilog-A
Idioma
Inglês
Como citar
2019 Ieee 10th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, p. 21-24, 2019.
