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Study of line-TFET analog performance comparing with other TFET and MOSFET architectures

dc.contributor.authorAgopian, Paula Ghedini Der [UNESP]
dc.contributor.authorMartino, João Antonio
dc.contributor.authorVandooren, Anne
dc.contributor.authorRooyackers, Rita
dc.contributor.authorSimoen, Eddy
dc.contributor.authorThean, Aaron
dc.contributor.authorClaeys, Cor
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionimec
dc.contributor.institutionKULeuven
dc.date.accessioned2018-12-11T16:45:10Z
dc.date.available2018-12-11T16:45:10Z
dc.date.issued2017-02-01
dc.description.abstractIn this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application.en
dc.description.affiliationLSI/PSI/USP – University of São Paulo, Av. Prof. Luciano Gualberto, trav. 3 no 158, 05508-010 Sao Paulo
dc.description.affiliationUNESP – Universidade Estadual Paulista, São João da Boa Vista
dc.description.affiliationimec, Kapeldreef 75
dc.description.affiliationE.E. Dept KULeuven
dc.description.affiliationUnespUNESP – Universidade Estadual Paulista, São João da Boa Vista
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.format.extent43-47
dc.identifierhttp://dx.doi.org/10.1016/j.sse.2016.10.021
dc.identifier.citationSolid-State Electronics, v. 128, p. 43-47.
dc.identifier.doi10.1016/j.sse.2016.10.021
dc.identifier.file2-s2.0-85007247104.pdf
dc.identifier.issn0038-1101
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-85007247104
dc.identifier.urihttp://hdl.handle.net/11449/169278
dc.language.isoeng
dc.relation.ispartofSolid-State Electronics
dc.relation.ispartofsjr0,492
dc.rights.accessRightsAcesso abertopt
dc.sourceScopus
dc.subjectDifferent device architectures
dc.subjectIntrinsic voltage gain
dc.subjectLine-TFET
dc.titleStudy of line-TFET analog performance comparing with other TFET and MOSFET architecturesen
dc.typeArtigopt
dspace.entity.typePublication
unesp.author.lattes0496909595465696[1]
unesp.author.orcid0000-0002-0886-7798[1]
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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