Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
dc.contributor.author | Agopian, Paula Ghedini Der [UNESP] | |
dc.contributor.author | Martino, João Antonio | |
dc.contributor.author | Vandooren, Anne | |
dc.contributor.author | Rooyackers, Rita | |
dc.contributor.author | Simoen, Eddy | |
dc.contributor.author | Thean, Aaron | |
dc.contributor.author | Claeys, Cor | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.contributor.institution | imec | |
dc.contributor.institution | KULeuven | |
dc.date.accessioned | 2018-12-11T16:45:10Z | |
dc.date.available | 2018-12-11T16:45:10Z | |
dc.date.issued | 2017-02-01 | |
dc.description.abstract | In this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application. | en |
dc.description.affiliation | LSI/PSI/USP – University of São Paulo, Av. Prof. Luciano Gualberto, trav. 3 no 158, 05508-010 Sao Paulo | |
dc.description.affiliation | UNESP – Universidade Estadual Paulista, São João da Boa Vista | |
dc.description.affiliation | imec, Kapeldreef 75 | |
dc.description.affiliation | E.E. Dept KULeuven | |
dc.description.affiliationUnesp | UNESP – Universidade Estadual Paulista, São João da Boa Vista | |
dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
dc.description.sponsorship | Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) | |
dc.format.extent | 43-47 | |
dc.identifier | http://dx.doi.org/10.1016/j.sse.2016.10.021 | |
dc.identifier.citation | Solid-State Electronics, v. 128, p. 43-47. | |
dc.identifier.doi | 10.1016/j.sse.2016.10.021 | |
dc.identifier.file | 2-s2.0-85007247104.pdf | |
dc.identifier.issn | 0038-1101 | |
dc.identifier.lattes | 0496909595465696 | |
dc.identifier.orcid | 0000-0002-0886-7798 | |
dc.identifier.scopus | 2-s2.0-85007247104 | |
dc.identifier.uri | http://hdl.handle.net/11449/169278 | |
dc.language.iso | eng | |
dc.relation.ispartof | Solid-State Electronics | |
dc.relation.ispartofsjr | 0,492 | |
dc.rights.accessRights | Acesso aberto | pt |
dc.source | Scopus | |
dc.subject | Different device architectures | |
dc.subject | Intrinsic voltage gain | |
dc.subject | Line-TFET | |
dc.title | Study of line-TFET analog performance comparing with other TFET and MOSFET architectures | en |
dc.type | Artigo | pt |
dspace.entity.type | Publication | |
unesp.author.lattes | 0496909595465696[1] | |
unesp.author.orcid | 0000-0002-0886-7798[1] | |
unesp.campus | Universidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vista | pt |
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