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Impact of the Zn diffusion process at the source side of InXGa1-XAs nTFETs on the analog parameters down to 10 K

dc.contributor.authorBordallo, C.
dc.contributor.authorMartino, J.
dc.contributor.authorAgopian, P. [UNESP]
dc.contributor.authorAlian, A.
dc.contributor.authorMols, Y.
dc.contributor.authorRooyackers, R.
dc.contributor.authorVandooren, A.
dc.contributor.authorVerhulst, A.
dc.contributor.authorSimoen, E.
dc.contributor.authorClaeys, C.
dc.contributor.authorCollaert, N.
dc.contributor.authorIEEE
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionIMEC
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionKatholieke Univ Leuven
dc.date.accessioned2019-10-04T19:12:36Z
dc.date.available2019-10-04T19:12:36Z
dc.date.issued2017-01-01
dc.description.abstractIn this work, the impact of the Zn diffusion processes in the source and the amount of Indium for InxGa1-xAs nTFET was analyzed, focusing on the basic analog parameters. Three different splits were analyzed: In0.53Ga0.47As with Spin-on-Glass (SoG) Zn diffusion in the source, In0.7Ga0.3As using SoG and In0.53Ga0.47As with Gas Phase Zn diffusion in the source. The ION increase of the Gas Phase device can be related to its higher source/channel junction abruptness that also reduces the tunneling length. The Gas Phase device has presented better subthreshold swing, which increases the transistor efficiency in the weak conduction regime. The Gas Phase device presents the lowest intrinsic voltage gain (AV) for high gate voltage (V-GS) values due to its significant output conductance (gD) degradation. However, the reduction of the temperature affects more gD than gm, resulting in an improvement of AV by more than 20 dB at 10 K for the Gas Phase device compared to both SOG splits.en
dc.description.affiliationUniv Sao Paulo, PSI, LSI, Sao Paulo, Brazil
dc.description.affiliationIMEC, Leuven, Belgium
dc.description.affiliationUniv Estadual Paulista, UNESP, Campus Sao Joao Da Boa Vista, Sao Joao Da Boa Vista, Brazil
dc.description.affiliationKatholieke Univ Leuven, EE Dept, Leuven, Belgium
dc.description.affiliationUnespUniv Estadual Paulista, UNESP, Campus Sao Joao Da Boa Vista, Sao Joao Da Boa Vista, Brazil
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.description.sponsorshipimec's Logic Device Program
dc.format.extent3
dc.identifier.citation2017 Ieee Soi-3d-subthreshold Microelectronics Technology Unified Conference (s3s). New York: Ieee, 3 p., 2017.
dc.identifier.issn2573-5926
dc.identifier.urihttp://hdl.handle.net/11449/186357
dc.identifier.wosWOS:000463041500086
dc.language.isoeng
dc.publisherIeee
dc.relation.ispartof2017 Ieee Soi-3d-subthreshold Microelectronics Technology Unified Conference (s3s)
dc.rights.accessRightsAcesso abertopt
dc.sourceWeb of Science
dc.subjectTFET
dc.subjectTemperature
dc.subjectAnalog Parameters
dc.subjectIII-V materials
dc.titleImpact of the Zn diffusion process at the source side of InXGa1-XAs nTFETs on the analog parameters down to 10 Ken
dc.typeTrabalho apresentado em eventopt
dcterms.licensehttp://www.ieee.org/publications_standards/publications/rights/rights_policies.html
dcterms.rightsHolderIeee
dspace.entity.typePublication
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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