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Reversible Circuit Optimization based on Tabu Search

dc.contributor.authorAlmeida, Alexandre A. A. de [UNESP]
dc.contributor.authorDueck, Gerhard W.
dc.contributor.authorSilva, Alexandre C. R. da [UNESP]
dc.contributor.authorIEEE
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionUniv New Brunswick
dc.date.accessioned2021-06-25T12:20:24Z
dc.date.available2021-06-25T12:20:24Z
dc.date.issued2018-01-01
dc.description.abstractAn algorithm, based on the meta-heuristic technique known as Tabu Search, was developed to optimize reversible circuits. A set of rules that can modify the reversible circuit to be optimized are applied. The movement of gates may increase, decrease, or leave the number of gates unchanged. In this context, an algorithm was developed to control the application of these rules. The idea of the proposed algorithm is to divide the reversible circuit into neighborhoods and perform a Tabu search to find the best local solution in each neighborhood, penalizing the rules that were already applied in the iteration. The results of optimized benchmark functions shows the efficiency of the algorithm, reducing reversible circuits by up to 62%.en
dc.description.affiliationFEIS Univ Estadual Paulista, Dept Elect Engn, Ilha Solteira, SP, Brazil
dc.description.affiliationUniv New Brunswick, Fac Comp Sci, Fredericton, NB, Canada
dc.description.affiliationUnespFEIS Univ Estadual Paulista, Dept Elect Engn, Ilha Solteira, SP, Brazil
dc.description.sponsorshipCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipNSERC
dc.description.sponsorshipIdCNPq: 309193/2015-0
dc.format.extent103-108
dc.identifierhttp://dx.doi.org/10.1109/ISMVL.2018.00026
dc.identifier.citation2018 Ieee 48th International Symposium On Multiple-valued Logic (ismvl 2018). New York: Ieee, p. 103-108, 2018.
dc.identifier.doi10.1109/ISMVL.2018.00026
dc.identifier.issn0195-623X
dc.identifier.urihttp://hdl.handle.net/11449/209499
dc.identifier.wosWOS:000574768400018
dc.language.isoeng
dc.publisherIeee
dc.relation.ispartof2018 Ieee 48th International Symposium On Multiple-valued Logic (ismvl 2018)
dc.sourceWeb of Science
dc.titleReversible Circuit Optimization based on Tabu Searchen
dc.typeTrabalho apresentado em evento
dcterms.licensehttp://www.ieee.org/publications_standards/publications/rights/rights_policies.html
dcterms.rightsHolderIeee
dspace.entity.typePublication
unesp.departmentEngenharia Elétrica - FEISpt

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