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Opposite trends between digital and analog performance for different TFET technologies

dc.contributor.authorAgopian, P. G.D. [UNESP]
dc.contributor.authorBordallo, C.
dc.contributor.authorMartino, J. A.
dc.contributor.authorRooyackers, R.
dc.contributor.authorSimoen, E.
dc.contributor.authorCollaert, N.
dc.contributor.authorClaeys, C.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionImec
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:54:02Z
dc.date.available2018-12-11T16:54:02Z
dc.date.issued2018-05-29
dc.description.abstractDifferent Tunnel-FET technologies are analyzed in terms of digital and analog figures of merit. The digital figure of merit used was the subthreshold swing (SS), while the analog parameter was the intrinsic voltage gain (AV). In the early technologies based on silicon TFET devices, the SS was much higher than the ideal behavior. However, the Av was very good, reaching a value up to 80 dB. The opposite trends were observed for up to date technologies based on III-V materials, where the SS finally reaches values down to 60 mV/dec while the AV degrades to 32 dB. The explanation is related to the predominant conduction mechanism. In the III-V TFETs, Band to Band (B2B) Tunneling is the predominant mechanism, which is more sensible to the drain electric field, increasing the output conductance and degrading the AV. In the silicon based TFETs the Trap-Assisted-Tunneling (TAT) is the predominant mechanism, which is less dependent on the drain electric field, resulting in a better AV.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationSao Paulo State University (UNESP) Campus Sao Joao da Boa Vista
dc.description.affiliationImec
dc.description.affiliationE.E. Dept KU Leuven
dc.description.affiliationUnespSao Paulo State University (UNESP) Campus Sao Joao da Boa Vista
dc.format.extent1-4
dc.identifierhttp://dx.doi.org/10.1109/CSTIC.2018.8369184
dc.identifier.citationChina Semiconductor Technology International Conference 2018, CSTIC 2018, p. 1-4.
dc.identifier.doi10.1109/CSTIC.2018.8369184
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-85048899595
dc.identifier.urihttp://hdl.handle.net/11449/171128
dc.language.isoeng
dc.relation.ispartofChina Semiconductor Technology International Conference 2018, CSTIC 2018
dc.rights.accessRightsAcesso restritopt
dc.sourceScopus
dc.subjectdigital and analog performance
dc.subjectgeometries
dc.subjectnew materials
dc.subjectTFET
dc.titleOpposite trends between digital and analog performance for different TFET technologiesen
dc.typeTrabalho apresentado em eventopt
dspace.entity.typePublication
unesp.author.lattes0496909595465696[1]
unesp.author.orcid0000-0002-0886-7798[1]
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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