Publicação: Efficient Realizations of CNOT gates in IBM's Quantum Computers
dc.contributor.author | De Almeida, Alexandre A. A. [UNESP] | |
dc.contributor.author | Dueck, Gerhard W. | |
dc.contributor.author | Da Silva, Alexandre C. R. [UNESP] | |
dc.contributor.institution | Universidade Estadual Paulista (UNESP) | |
dc.contributor.institution | University of New Brunswick | |
dc.date.accessioned | 2022-04-29T08:28:04Z | |
dc.date.available | 2022-04-29T08:28:04Z | |
dc.date.issued | 2018-07-02 | |
dc.description.abstract | IBM's quantum computers implement gates from Clifford +T gate library. All single qubit gates are implemented, but only a subset of the possible CNOT are provided. It is well known that the functionally of the missing gates can be achieved by a sequence of gates. The sequence of gates is based on SWAP gates. Up to seven elementary gates are required to implement a SWAP gate. In this paper we show how the same effect can be achieved with fewer gates. To show the potential of the proposed transformations, an example is presented where a reduction of 44% in the gate count and a 26% reduction in the number of levels for IBM's QX5 computer is achieved. An algorithm that is considered state of the art, is used for the comparison. | en |
dc.description.affiliation | Department of Electrical Engineering FEIS - Univ Estadual Paulista | |
dc.description.affiliation | Faculty of Computer Science University of New Brunswick | |
dc.description.affiliationUnesp | Department of Electrical Engineering FEIS - Univ Estadual Paulista | |
dc.description.sponsorship | Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) | |
dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
dc.description.sponsorshipId | CAPES: 309193/2015-0 | |
dc.description.sponsorshipId | CNPq: 309193/2015-0 | |
dc.format.extent | 58-62 | |
dc.identifier | http://dx.doi.org/10.1109/ISED.2018.8704098 | |
dc.identifier.citation | Proceedings of the 2018 8th International Symposium on Embedded Computing and System Design, ISED 2018, p. 58-62. | |
dc.identifier.doi | 10.1109/ISED.2018.8704098 | |
dc.identifier.scopus | 2-s2.0-85065963720 | |
dc.identifier.uri | http://hdl.handle.net/11449/228683 | |
dc.language.iso | eng | |
dc.relation.ispartof | Proceedings of the 2018 8th International Symposium on Embedded Computing and System Design, ISED 2018 | |
dc.source | Scopus | |
dc.title | Efficient Realizations of CNOT gates in IBM's Quantum Computers | en |
dc.type | Trabalho apresentado em evento | |
dspace.entity.type | Publication | |
unesp.department | Engenharia Elétrica - FEIS | pt |