FPGA-based power meter implementation for three-phase three-wire and four-wire power systems, according to IEEE 1459-2010 standard

Abstract

This paper proposes an electric power measurement implementation by using an FPGA (Field Programmable Gate Arrays) device, based on the power calculation theory defined by the IEEE 1459-2010 Standard. The modules synthesized in the programmable logic device (PLD) are fully developed in a hardware description language (HDL), allowing the control over all variables and signals present in the system. This methodology attends the windowing specifications established by the NBR IEC 61000-4-30:2011 Standard for power quality measurement methods. Finally, the hardware structure described in the FPGA and the developed analog signal conditioning platform are presented along with experimental results for three-phase power systems in several scenarios.