Publicação: Experimental silicon tunnel-FET device model applied to design a Gm-C filter
dc.contributor.author | Rangel, R. S. | |
dc.contributor.author | Agopian, P. G. D. [UNESP] | |
dc.contributor.author | Martino, J. A. | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.contributor.institution | Univ Toronto | |
dc.date.accessioned | 2020-12-10T17:40:33Z | |
dc.date.available | 2020-12-10T17:40:33Z | |
dc.date.issued | 2020-09-01 | |
dc.description.abstract | This work presents the design of a Gm-C filter using experimental data of a silicon tunneling field effect transistors (TFET) device. The application takes advantage of the low g(m)of a Si TFET device, resulting in an optimized low cutoff frequency filter, desired, for example, in biomedical applications. A look-up table model is used, with the experimental device data as input, which is reported to have an accurate response comparing to the measurements. The design of an operational amplifier circuit, the main part of a Gm-C filter, is presented, where around 100 dB voltage gain with two-stage topology is obtained. The filter showed a 100 Hz cutoff frequency response with 36 nW pole(-1)power consumption, which represents a significant improvement in comparison to recently reported designs using CMOS technology. | en |
dc.description.affiliation | Univ Sao Paulo, LSI, PSI, Sao Paulo, Brazil | |
dc.description.affiliation | Sao Paulo State Univ, UNESP, Sao Joao Da Boa Vista, Brazil | |
dc.description.affiliation | Univ Toronto, ECE, Toronto, ON, Canada | |
dc.description.affiliationUnesp | Sao Paulo State Univ, UNESP, Sao Joao Da Boa Vista, Brazil | |
dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
dc.format.extent | 7 | |
dc.identifier | http://dx.doi.org/10.1088/1361-6641/ab9ea8 | |
dc.identifier.citation | Semiconductor Science And Technology. Bristol: Iop Publishing Ltd, v. 35, n. 9, 7 p., 2020. | |
dc.identifier.doi | 10.1088/1361-6641/ab9ea8 | |
dc.identifier.issn | 0268-1242 | |
dc.identifier.uri | http://hdl.handle.net/11449/195614 | |
dc.identifier.wos | WOS:000561585200001 | |
dc.language.iso | eng | |
dc.publisher | Iop Publishing Ltd | |
dc.relation.ispartof | Semiconductor Science And Technology | |
dc.source | Web of Science | |
dc.subject | tunnel-field effect transistor | |
dc.subject | analog design | |
dc.subject | verilog-A | |
dc.title | Experimental silicon tunnel-FET device model applied to design a Gm-C filter | en |
dc.type | Artigo | pt |
dcterms.license | http://iopscience.iop.org/page/copyright | |
dcterms.rightsHolder | Iop Publishing Ltd | |
dspace.entity.type | Publication | |
unesp.campus | Universidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vista | pt |