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Publicação:
OPPOSITE TRENDS BETWEEN DIGITAL AND ANALOG PERFORMANCE FOR DIFFERENT TFET TECHNOLOGIES

dc.contributor.authorAgopian, P. G. D. [UNESP]
dc.contributor.authorBordallo, C.
dc.contributor.authorMartino, J. A.
dc.contributor.authorRooyackers, R.
dc.contributor.authorSimoen, E.
dc.contributor.authorCollaert, N.
dc.contributor.authorClaeys, C.
dc.contributor.authorHuang, R.
dc.contributor.authorWu, H.
dc.contributor.authorLin, Q.
dc.contributor.authorLiang, S.
dc.contributor.authorSong, P. L.
dc.contributor.authorGuo, Z.
dc.contributor.authorLai, K.
dc.contributor.authorZhang, Y.
dc.contributor.authorWang, Y.
dc.contributor.authorShi, Y.
dc.contributor.authorLung, H. L.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)
dc.contributor.institutionIMEC
dc.contributor.institutionKatholieke Univ Leuven
dc.date.accessioned2022-04-28T17:20:27Z
dc.date.available2022-04-28T17:20:27Z
dc.date.issued2018-01-01
dc.description.abstractDifferent Tunnel-FET technologies are analyzed in terms of digital and analog figures of merit. The digital figure of merit used was the subthreshold swing (SS), while the analog parameter was the intrinsic voltage gain (AV). In the early technologies based on silicon TFET devices, the SS was much higher than the ideal behavior. However, the Av was very good, reaching a value up to 80 dB. The opposite trends were observed for up to date technologies based on III-V materials, where the SS finally reaches values down to 60 mV/dec while the AV degrades to 32 dB. The explanation is related to the predominant conduction mechanism. In the III-V TFETs, Band to Band (B2B) Tunneling is the predominant mechanism, which is more sensible to the drain electric field, increasing the output conductance and degrading the AV. In the silicon based TFETs the Trap-Assisted-Tunneling (TAT) is the predominant mechanism, which is less dependent on the drain electric field, resulting in a better AV.en
dc.description.affiliationUniv Sao Paulo, LSI PSI USP, Sao Paulo, Brazil
dc.description.affiliationSao Paulo State Univ, UNESP, Campus Sao Joao da Boa Vista, Sao Paulo, Brazil
dc.description.affiliationIMEC, Leuven, Belgium
dc.description.affiliationKatholieke Univ Leuven, EE Dept, Leuven, Belgium
dc.description.affiliationUnespSao Paulo State Univ, UNESP, Campus Sao Joao da Boa Vista, Sao Paulo, Brazil
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.description.sponsorshipimec's Logic Device Program and its Core Partners
dc.format.extent4
dc.identifier.citation2018 China Semiconductor Technology International Conference (cstic). New York: Ieee, 4 p., 2018.
dc.identifier.urihttp://hdl.handle.net/11449/218327
dc.identifier.wosWOS:000682776100019
dc.language.isoeng
dc.publisherIeee
dc.relation.ispartof2018 China Semiconductor Technology International Conference (cstic)
dc.sourceWeb of Science
dc.subjectTFET
dc.subjectgeometries
dc.subjectnew materials
dc.subjectdigital and analog performance
dc.titleOPPOSITE TRENDS BETWEEN DIGITAL AND ANALOG PERFORMANCE FOR DIFFERENT TFET TECHNOLOGIESen
dc.typeTrabalho apresentado em eventopt
dcterms.licensehttp://www.ieee.org/publications_standards/publications/rights/rights_policies.html
dcterms.rightsHolderIeee
dspace.entity.typePublication
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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