Publicação: Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications
dc.contributor.author | Dos Santos, Rodrigo Bispo [UNESP] | |
dc.contributor.author | Rizol, Paloma M. S. Rocha [UNESP] | |
dc.contributor.author | Mesquita, Leonardo [UNESP] | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.date.accessioned | 2018-12-11T17:25:58Z | |
dc.date.available | 2018-12-11T17:25:58Z | |
dc.date.issued | 2015-01-01 | |
dc.description.abstract | The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35μm technology through Pspice software using a single supply voltage of 1.8V. | en |
dc.description.affiliation | UNESP. Univ. Estadual Paulista | |
dc.description.affiliationUnesp | UNESP. Univ. Estadual Paulista | |
dc.identifier | http://dx.doi.org/10.1109/LASCAS.2015.7250476 | |
dc.identifier.citation | 2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings. | |
dc.identifier.doi | 10.1109/LASCAS.2015.7250476 | |
dc.identifier.lattes | 9186632586177726 | |
dc.identifier.lattes | 9338079447464341 | |
dc.identifier.orcid | 0000-0001-5246-4438 | |
dc.identifier.scopus | 2-s2.0-84945156769 | |
dc.identifier.uri | http://hdl.handle.net/11449/177557 | |
dc.language.iso | eng | |
dc.relation.ispartof | 2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings | |
dc.rights.accessRights | Acesso restrito | |
dc.source | Scopus | |
dc.subject | Interval type-2 fuzzy logic controller | |
dc.subject | Multiplier/divider | |
dc.subject | Type-2 fuzzy logic | |
dc.title | Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications | en |
dc.type | Trabalho apresentado em evento | |
dspace.entity.type | Publication | |
unesp.advisor.lattes | 9338079447464341[3] | |
unesp.author.lattes | 9186632586177726[2] | |
unesp.author.orcid | 0000-0001-5246-4438[2] | |
unesp.department | Engenharia Elétrica - FEG | pt |