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Hardware implementation of an analog neural nonderivative optimizer

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dc.contributor.authorCardim, Rodrigo
dc.contributor.authorTeixeira, Marcelo C. M.
dc.contributor.authorAssuncao, Edvaldo
dc.contributor.authorOki, Nobuo
dc.contributor.authorde Carvalho, Aparecido A.
dc.contributor.authorCovacic, Marcio R.
dc.contributor.authorKing, I
dc.contributor.authorWang, J.
dc.contributor.authorChan, L.
dc.contributor.authorWang, D. L.
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2014-05-20T13:28:56Z
dc.date.available2014-05-20T13:28:56Z
dc.date.issued2006-01-01
dc.description.abstractAnalog neural systems that can automatically find the minimum value of the outputs of unknown analog systems, described by convex functions, are studied. When information about derivative or gradient are not used, these systems are called analog nonderivative optimizers. An electronic circuit for the analog neural nonderivative optimizer proposed by Teixeira and Zak, and its simulation with software PSPICE, is presented. With the simulation results and hardware implementation of the system, the validity of the proposed optimizer can be verified. These results are original, from the best of the authors knowledge.en
dc.description.affiliationUniv Nacl Estadual São Paulo, UNESP, Dept Elect Engn, BR-15385000 Ilha Solteira, SP, Brazil
dc.description.affiliationUnespUniv Nacl Estadual São Paulo, UNESP, Dept Elect Engn, BR-15385000 Ilha Solteira, SP, Brazil
dc.format.extent1131-1140
dc.identifierhttp://dx.doi.org/10.1007/11893295_125
dc.identifier.citationNeural Information Processing, Pt 3, Proceedings. Berlin: Springer-verlag Berlin, v. 4234, p. 1131-1140, 2006.
dc.identifier.doi10.1007/11893295_125
dc.identifier.issn0302-9743
dc.identifier.lattes8755160580142626
dc.identifier.lattes1525717947689076
dc.identifier.lattes5062087380571462
dc.identifier.orcid0000-0002-1072-3814
dc.identifier.urihttp://hdl.handle.net/11449/9668
dc.identifier.wosWOS:000241759000125
dc.language.isoeng
dc.publisherSpringer
dc.relation.ispartofNeural Information Processing, Pt 3, Proceedings
dc.relation.ispartofsjr0,295
dc.rights.accessRightsAcesso restrito
dc.sourceWeb of Science
dc.titleHardware implementation of an analog neural nonderivative optimizeren
dc.typeArtigo
dcterms.licensehttp://www.springer.com/open+access/authors+rights?SGWID=0-176704-12-683201-0
dcterms.rightsHolderSpringer
dspace.entity.typePublication
unesp.author.lattes8755160580142626
unesp.author.lattes1525717947689076
unesp.author.lattes0250066159980825[5]
unesp.author.lattes5062087380571462[1]
unesp.author.orcid0000-0001-8204-3482[5]
unesp.author.orcid0000-0002-1072-3814[1]
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, Ilha Solteirapt
unesp.departmentEngenharia Elétrica - FEISpt

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Ilha Solteira - FEIS - Faculdade de Engenharia