Publicação: Discrete wavelet transform signal analyzer
dc.contributor.author | Cox, Pedro Henrique | |
dc.contributor.author | de Carvalho, Aparecido Augusto [UNESP] | |
dc.contributor.institution | Universidade Federal de Mato Grosso do Sul (UFMS) | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.date.accessioned | 2014-05-27T11:22:36Z | |
dc.date.available | 2014-05-27T11:22:36Z | |
dc.date.issued | 2007-10-01 | |
dc.description.abstract | This paper addresses the problem of processing biological data, such as cardiac beats in the audio and ultrasonic range, and on calculating wavelet coefficients in real time, with the processor clock running at a frequency of present application-specified integrated circuits and field programmable gate array. The parallel filter architecture for discrete wavelet transform (DWT) has been improved, calculating the wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes inverse DWT, is implemented with the Radix-2 or the Booth-Wallace constant multipliers. One integrated circuit signal analyzer in the ultrasonic range, including series memory register banks, is presented. © 2007 IEEE. | en |
dc.description.affiliation | DEL CCET UFMS Departamento de Engenharia Elétrica Universidade Federal de Mato Grosso do Sul, 79070-900 Campo Grande | |
dc.description.affiliation | DEE FEIS UNESP Departamento de Engenharia Elétrica Universidade do Estado de São Paulo, 15385-000 Ilha Solteira | |
dc.description.affiliationUnesp | DEE FEIS UNESP Departamento de Engenharia Elétrica Universidade do Estado de São Paulo, 15385-000 Ilha Solteira | |
dc.format.extent | 1640-1647 | |
dc.identifier | http://dx.doi.org/10.1109/TIM.2007.894797 | |
dc.identifier.citation | IEEE Transactions on Instrumentation and Measurement, v. 56, n. 5, p. 1640-1647, 2007. | |
dc.identifier.doi | 10.1109/TIM.2007.894797 | |
dc.identifier.issn | 0018-9456 | |
dc.identifier.lattes | 0250066159980825 | |
dc.identifier.scopus | 2-s2.0-34648826984 | |
dc.identifier.uri | http://hdl.handle.net/11449/69903 | |
dc.language.iso | eng | |
dc.relation.ispartof | IEEE Transactions on Instrumentation and Measurement | |
dc.relation.ispartofjcr | 2.794 | |
dc.relation.ispartofsjr | 0,938 | |
dc.rights.accessRights | Acesso restrito | |
dc.source | Scopus | |
dc.subject | Asynchronous logic circuits | |
dc.subject | Digital filters | |
dc.subject | Digital signal processors | |
dc.subject | Last in last out memory | |
dc.subject | Logic design | |
dc.subject | Sequential machines | |
dc.subject | Signal analysis and synthesis | |
dc.subject | Discrete wavelet transforms | |
dc.subject | Field programmable gate arrays (FPGA) | |
dc.subject | Logic circuits | |
dc.subject | Booth-Wallace constant multipliers | |
dc.subject | Series memory register banks | |
dc.subject | Signal analysis | |
dc.title | Discrete wavelet transform signal analyzer | en |
dc.type | Artigo | |
dcterms.license | http://www.ieee.org/publications_standards/publications/rights/rights_policies.html | |
dspace.entity.type | Publication | |
unesp.author.lattes | 0250066159980825[2] | |
unesp.author.orcid | 0000-0001-8204-3482[2] | |
unesp.campus | Universidade Estadual Paulista (UNESP), Faculdade de Engenharia, Ilha Solteira | pt |
unesp.department | Engenharia Elétrica - FEIS | pt |