Back Gate Influence on Transistor Efficiency of SOI nMOS Omega-gate Nanowire down to 10nm Width
Nenhuma Miniatura disponível
Data
2017-01-01
Autores
Itocazu, Vitor T.
Luciano, M. Almeida
Sonnenberg, Victor
Agopian, Paula G. D. [UNESP]
Barraud, Sylvain
Vinet, Maud
Faynot, Olivier
Martino, Joao A.
IEEE
Título da Revista
ISSN da Revista
Título de Volume
Editor
Ieee
Resumo
This paper shows the influence of back gate bias on transistor efficiency of nMOS SOI Omega-gate nanowire, for different width and channel length. Threshold voltage and subthreshold swing present a higher variation with the back gate bias variation in wider devices. Long channel devices present better efficiency due to the better subthreshold swing, the same reason for the narrow devices have a better efficiency. Wider devices have a higher variation in efficiency when the back gate is biased. The transistor efficiency increases when the back gate is negative biased due to the better electrostatic coupling between gate and channel.
Descrição
Palavras-chave
SOI, Omega-Gate, Nanowire, Back gate, Transistor Efficiency
Como citar
2017 32nd Symposium On Microelectronics Technology And Devices (sbmicro): Chip On The Sands. New York: Ieee, 4 p., 2017.