Viabilidade da implementação do protocolo IPMI em um SYSTEM-ON-CHIP
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Data
2019-09-05
Autores
Souza, Sthefany Fernandes de
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Universidade Estadual Paulista (Unesp)
Resumo
Bastidores eletrônicos de alta performance e disponibilidade utilizam o protocolo Intelligent Platform Management Interface (IPMI) para gerenciar seus dispositivos, controlando e monitorando os recursos disponíveis. Neste contexto para inserir dispositivos com tecnologia mais avançada, novos projetos foram elaborados para atualização dos sistemas de hardware e software baseados em System-on-Chip (SoC), principalmente na área de Física de Alta Energia. Uma aplicação existente, desenvolvida na parceira São Paulo Research and Analysis Center – Fermi National Accelerator Laboratory (SPRACE–FERMILAB) na colaboração internacional do Compact Muon Solenoid detector/Large Hadron Collider/European Organization for Nuclear Research (CMS/LHC/CERN), utiliza o protocolo IPMI implementado em um microcontrolador, contudo, para o processo de atualização vigente, há um interesse desta implementação em SoC. Assim, esta pesquisa foi desenvolvida como o estudo da viabilidade da implementação IPMI em um SoC. Para estabelecer e verificar o protocolo IPMI via barramento I²C, a plataforma Xilinx ZC702 Evaluation Board foi utilizada com os respectivos dispositivos SoC Zynq e Erasable Programmable Memory (EEPROM). Além disso foi desenvolvido uma estrutura simples do IPMI no sistema operacional em tempo real (FreeRTOS) baseados em modelos de hardware e software criados na plataforma Xilinx IDE e SDK. Por meio dos resultados apresentados é possível constatar a viabilidade da implementação IPMI em sistemas como SoC Zynq como controlador de gerenciamento da plataforma, que possibilita a migração e o prosseguimento dos testes em plataformas Advanced Telecom Computing Architecture (ATCA) para uma comunicação real entre Zynq IPMC e o bastidor ATCA.
High performance and availability electronic racks use the Intelligent Platform Management Interface (IPMI) protocol to manage your devices by controlling and monitoring available resources. In this context to insert devices with more advanced technology, new projects were elaborated to update the System-on-Chip (SoC) based hardware and software systems, mainly in the area of High Energy Physics. An existing application developed at the São Paulo Research and Analysis Center partner - Fermi National Accelerator Laboratory (SPRACE – FERMILAB) in the international collaboration of the Compact Muon Solenoid detector/Large Hadron Collider/European Organization for Nuclear Research (CMS/LHC/CERN) uses The IPMI protocol implemented in a microcontroller, however, for the current update process, there is an interest of this implementation in SoC. Thus, this research was developed as the study of the viability of implementing IPMI in a SoC. To establish and verify the IPMI protocol via I²C bus, the Xilinx ZC702 Evaluation Board platform was used with the respective SoC Zynq and Erasable Programmable Memory (EEPROM) devices. In addition, a simple IPMI framework in the real time operating system (FreeRTOS) based on hardware and software models created on the Xilinx IDE and SDK platform was developed. From the results presented, it is possible to verify the viability of IPMI implementation in systems such as SoC Zynq as platform management controller, which allows migration and further testing on Advanced Telecom Computing Architecture (ATCA) platforms for real communication between Zynq IPMC and the shelf ATCA.
High performance and availability electronic racks use the Intelligent Platform Management Interface (IPMI) protocol to manage your devices by controlling and monitoring available resources. In this context to insert devices with more advanced technology, new projects were elaborated to update the System-on-Chip (SoC) based hardware and software systems, mainly in the area of High Energy Physics. An existing application developed at the São Paulo Research and Analysis Center partner - Fermi National Accelerator Laboratory (SPRACE – FERMILAB) in the international collaboration of the Compact Muon Solenoid detector/Large Hadron Collider/European Organization for Nuclear Research (CMS/LHC/CERN) uses The IPMI protocol implemented in a microcontroller, however, for the current update process, there is an interest of this implementation in SoC. Thus, this research was developed as the study of the viability of implementing IPMI in a SoC. To establish and verify the IPMI protocol via I²C bus, the Xilinx ZC702 Evaluation Board platform was used with the respective SoC Zynq and Erasable Programmable Memory (EEPROM) devices. In addition, a simple IPMI framework in the real time operating system (FreeRTOS) based on hardware and software models created on the Xilinx IDE and SDK platform was developed. From the results presented, it is possible to verify the viability of IPMI implementation in systems such as SoC Zynq as platform management controller, which allows migration and further testing on Advanced Telecom Computing Architecture (ATCA) platforms for real communication between Zynq IPMC and the shelf ATCA.
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Palavras-chave
Protocolo de comunicação IPMI, Protocolo de barramento I²C, Sistema-em-chip Zynq, Freertos, IPMI communication protocol, I²C bus protocol, System-on-chip Zynq