Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures

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dc.contributor.authorOliveira, Alberto Vinicius de
dc.contributor.authorAgopian, Paula Ghedini Der [UNESP]
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionimec
dc.contributor.institutionGhent University
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:42:27Z
dc.date.available2018-12-11T16:42:27Z
dc.date.issued2016-09-01
dc.description.abstractThis paper presents an experimental analysis of the analog application figures of merit: the intrinsic voltage gain (AV) and unit gain frequency, focusing on the performance comparison between silicon triple gate pFinFET devices, which were processed on both Si and Silicon-On-Insulator (SOI) substrates. The high temperature (from 25 °C to 150 °C) influence and different channel lengths and fin widths were also taken into account. While the temperature impact on the intrinsic voltage gain (AV) is limited, the unit gain frequency was strongly affected due to the carrier mobility degradation at higher temperatures, for both p- and n-type FinFET structures. In addition, the pFinFETs showed slightly larger AV values compared to the n-type counterparts, whereby the bulk FinFETs presented a higher dispersion than the SOI FinFETs.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo, Av. Prof. Luciano Gualberto, trav. 3 no 158
dc.description.affiliationUNESP
dc.description.affiliationimec, Kapeldreef 75
dc.description.affiliationDept. of Solid State Sciences Ghent University, Krijgslaan 281 S1
dc.description.affiliationEE Depart. KU Leuven, Kasteelpark Arenberg 10
dc.description.affiliationUnespUNESP
dc.format.extent124-129
dc.identifierhttp://dx.doi.org/10.1016/j.sse.2016.05.004
dc.identifier.citationSolid-State Electronics, v. 123, p. 124-129.
dc.identifier.doi10.1016/j.sse.2016.05.004
dc.identifier.file2-s2.0-84969508640.pdf
dc.identifier.issn0038-1101
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-84969508640
dc.identifier.urihttp://hdl.handle.net/11449/168671
dc.language.isoeng
dc.relation.ispartofSolid-State Electronics
dc.relation.ispartofsjr0,492
dc.rights.accessRightsAcesso aberto
dc.sourceScopus
dc.subjectAnalog parameters
dc.subjectBulk pFinFET
dc.subjectHigh temperature
dc.subjectSOI pFinFET
dc.titleComparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperaturesen
dc.typeArtigo
unesp.author.lattes0496909595465696[2]
unesp.author.orcid0000-0002-0886-7798[2]

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