LUTS: A Lightweight User-Level Transaction Scheduler

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dc.contributor.authorNicacio, Daniel
dc.contributor.authorBaldassin, Alexandro [UNESP]
dc.contributor.authorAraujo, Guido
dc.contributor.authorXiang, Y.
dc.contributor.authorCuzzocrea, A.
dc.contributor.authorHobbs, M.
dc.contributor.authorZhou, W. L.
dc.contributor.institutionUniversidade Estadual de Campinas (UNICAMP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2020-12-10T16:36:17Z
dc.date.available2020-12-10T16:36:17Z
dc.date.issued2011-01-01
dc.description.abstractSoftware Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LOTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios.en
dc.description.affiliationIC UNICAMP, Campinas, SP, Brazil
dc.description.affiliationUniv Estadual Paulista, UNESP, Rio Claro, Brazil
dc.description.affiliationUnespUniv Estadual Paulista, UNESP, Rio Claro, Brazil
dc.format.extent144-+
dc.identifier.citationAlgorithms And Architectures For Parallel Processing, Pt I. Berlin: Springer-verlag Berlin, v. 7916, p. 144-+, 2011.
dc.identifier.issn0302-9743
dc.identifier.urihttp://hdl.handle.net/11449/194743
dc.identifier.wosWOS:000307023100013
dc.language.isoeng
dc.publisherSpringer
dc.relation.ispartofAlgorithms And Architectures For Parallel Processing, Pt I
dc.sourceWeb of Science
dc.titleLUTS: A Lightweight User-Level Transaction Scheduleren
dc.typeTrabalho apresentado em evento
dcterms.licensehttp://www.springer.com/open+access/authors+rights?SGWID=0-176704-12-683201-0
dcterms.rightsHolderSpringer

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