Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data
dc.contributor.author | Tolêdo, Rodrigo do Nascimento | |
dc.contributor.author | Silva, Wenita de Lima | |
dc.contributor.author | Gonçalez Filho, Walter | |
dc.contributor.author | Nogueira, Alexandro de Moraes | |
dc.contributor.author | Martino, Joao Antonio | |
dc.contributor.author | Agopian, Paula Ghedini Der [UNESP] | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | Universidade Estadual Paulista (UNESP) | |
dc.date.accessioned | 2023-03-01T19:55:39Z | |
dc.date.available | 2023-03-01T19:55:39Z | |
dc.date.issued | 2022-08-01 | |
dc.description.abstract | This paper presents the comparison of Low-Dropout Voltage Regulators (LDOs) designed with Nanowire (NW-TFET) and Line Tunnel FET (Line-TFET), in which the transistors were modeled using Verilog-A and Lookup Tables (LUTs) obtained from experimental data. The LDOs were designed in two gm/ID, load currents and capacitances conditions: 7 V−1, 100 µA, 100 pF and 10.5 V−1, 10 µA, 10 pF. For comparison, a MOSFET LDO was designed with TSCM 0.18 µm PDK. It was observed that both TFET LDOs can be designed without the compensation capacitor to reach stability. The Line-TFET LDO delivers better specifications than the NW-TFET LDO, but with higher current consumption. Comparing with MOSFET LDO, both TFET LDOs present higher efficiency. The Line-TFET LDO showed higher loop gain and lower, but comparable, gain-bandwidth product (GBW) in both biases. | en |
dc.description.affiliation | LSI/PSI/USP University of Sao Paulo | |
dc.description.affiliation | UNESP Sao Paulo State University | |
dc.description.affiliationUnesp | UNESP Sao Paulo State University | |
dc.identifier | http://dx.doi.org/10.1016/j.sse.2022.108328 | |
dc.identifier.citation | Solid-State Electronics, v. 194. | |
dc.identifier.doi | 10.1016/j.sse.2022.108328 | |
dc.identifier.issn | 0038-1101 | |
dc.identifier.scopus | 2-s2.0-85129235909 | |
dc.identifier.uri | http://hdl.handle.net/11449/239970 | |
dc.language.iso | eng | |
dc.relation.ispartof | Solid-State Electronics | |
dc.source | Scopus | |
dc.subject | Analog circuit design | |
dc.subject | Line-TFET | |
dc.subject | Low-dropout voltage regulator (LDO) | |
dc.subject | Nanowire | |
dc.subject | Tunnel FET (TFET) | |
dc.title | Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data | en |
dc.type | Artigo |