São Paulo - NCC - Núcleo de Computação Científica
URI Permanente para esta coleçãohttps://hdl.handle.net/11449/296054
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PublicaçãoTrabalho apresentado em evento A flexible and low-cost open-source IPMC mezzanine for ATCA boards based on OpenIPMC(2022-03-01) Calligaris, L.
; Cascadan, A. ; Ardila-Perez, L. E. ; Pesaresi, M. ; Fedi, G. ; Peck, A. ; Gastler, D. ; Universidade Estadual Paulista (UNESP) ; Karlsruhe Institute of Technology ; Imperial College London ; Boston University This work presents the development of an Intelligent Platform Management Controller mezzanine in a Mini DIMM form factor for use in electronic boards compliant to the PICMG Advanced Telecommunication Computing Architecture (ATCA) standard. The module is based on an STMicroelectronics STM32H745 microcontroller running the OpenIPMC open-source software. The mezzanine has been successfully tested on a variety of ATCA boards being proposed for the upgrade of the experiments at the HL-LHC, with its design and firmware being distributed under open-source hardware license.PublicaçãoTrabalho apresentado em evento Towards a Strategy for Performance Prediction on Heterogeneous Architectures(2019-01-01) Stanzani, Silvio; Cóbe, Raphael ; Fialho, Jefferson ; Iope, Rogério ; Gomes, Marco ; Baruchi, Artur ; Amaral, Júlio ; Universidade Estadual Paulista (UNESP) Performance prediction of applications has always been a great challenge, even for homogeneous architectures. However, today’s trend is the design of cluster running in a heterogeneous architecture, which increases the complexity of new strategies to predict the behavior and time spent by an application to run. In this paper we present a strategy that predicts the performance of an application on different architectures and rank then according to the performance that the application can achieve on each architecture. The proposed strategy was able to correctly rank three of four applications tested without overhead implications. Our next step is to extend the metrics in order to increase the accuracy.PublicaçãoTrabalho apresentado em evento A framework for development and test of XTCA modules with FPGA based systems for particle detectors∗(2016-01-01) Paiva, T. C. ; Ramalho, L. A. ; Shinoda, A. A. ; Cascadan, A.; Ferreira, V. F. ; Vaz, M. ; Universidade Estadual Paulista (Unesp) This work describes a framework to develop firmware for ATCA carrier boards with FPGA. It is composed of an ATCA IPMI protocol implementation for environmental monitoring and control, and a companion XVC protocol implementation for remote FPGA configuration and system debugging. A study case is also presented of the development of a setup to validate a Level 1 Tracker Trigger System proposed for CMS at HL-LHC.PublicaçãoTrabalho apresentado em evento 
Acesso Aberto Development of an Intelligent Platform Management controller for the Pulsar IIb(2016-10-03) Ramalho, Lucas A.; Paiva, Thiago C. ; Iope, Rogerio L. ; Leal, Beraldo C. ; Liu, Tiehui T. ; Olsen, Jamieson ; Shinoda, Ailton A. ; Vaz, Mario ; Universidade Estadual Paulista (Unesp) ; Fermi National Accelerator Laboratory Fermilab The Pulsar IIb is a general purpose FPGA-based processor board designed for full mesh ATCA backplanes. This hardware was originally designed to support Level-1 silicon track trigger R&D projects at the LHC. Each ATCA carrier board is required to support the Intelligent Platform Management Interface (IPMI) protocol, which is responsible for coordinating hot swap operations and for exchanging sensor data with the shelf manager. This work describes the development of the microcontroller software which supports the IPMI protocol as well as additional non-IPMI services used to remotely program the Pulsar IIb FPGA.PublicaçãoTrabalho apresentado em evento Acesso Aberto Development of an Intelligent Platform Management Controller for the Pulsar IIb(Ieee, 2015-01-01) Ramalho, Lucas A.; Paiva, Thiago C. ; Iope, Rogerio L. ; Leal, Beraldo C. ; Liu, Tiehui T. ; Olsen, Jamieson ; Shinoda, Ailton A. ; Vaz, Mario ; IEEE ; Universidade Estadual Paulista (Unesp) ; Fermilab Natl Accelerator Lab The Pulsar IIb is a general purpose FPGA-based processor board designed for full mesh ATCA backplanes. This hardware was originally designed to support Level-1 silicon track trigger R&D projects at the LHC. Each ATCA carrier board is required to support the Intelligent Platform Management Interface (IPMI) protocol, which is responsible for coordinating hot swap operations and for exchanging sensor data with the shelf manager. This work describes the development of the microcontroller software which supports the IPMI protocol as well as additional non-IPMI services used to remotely program the Pulsar IIb FPGA.