Parasitic conduction on Ω-gate nanowires SOI nMOSFETs

In this work is analyzed the influence of fixed charges and interface traps on the subthreshold region of O-Gate Nanowires SOI nMOSFETs devices with different channel width (Wfin) and length (L). The implementation of the fixed charges on the back interface (channel/buried oxide) results in a parasitic conduction in this region, reducing the effective threshold voltage of the transistor. It was verified that the presence of these fixed charges and of the interface traps hardly affect the subthreshold swing due to the strong coupling among the interfaces.