Publication: n-Channel Bulk and DTMOS FinFETs: Investigation of GIDL and Gate Leakage Currents
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Date
Advisor
Coadvisor
Graduate program
Undergraduate course
Journal Title
Journal ISSN
Volume Title
Publisher
Ieee
Type
Work presented at event
Access right
Acesso aberto
Abstract
In this work GIDL (Gate Induced Drain Leakage) and Gate Leakage Currents (I-G) have been experimentally investigated for different dimensions of Bulk FinFETs with and without Dynamic Threshold MOS configuration (DTMOS) in linear and saturation regions. The results indicate that Bulk FinFETs present lower gate leakage currents than DTMOS FinFETs. In addition, an opposite I-G behavior of those devices was observed when the channel lengths change. On the other hand, for long channels FinFETs the GIDL effect is lower in devices with DTMOS configuration because the benefit of DTMOS operation becomes higher.
Description
Keywords
Bulk, DTMOS, leakage current, I-G, GIDL
Language
English
Citation
2016 31st Symposium On Microelectronics Technology And Devices (sbmicro). New York: Ieee, 4 p., 2016.
