Publicação: Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures
dc.contributor.author | Martino, M. D.V. | |
dc.contributor.author | Martino, J. A. | |
dc.contributor.author | Agopian, P. G.D. [UNESP] | |
dc.contributor.author | Vandooren, A. | |
dc.contributor.author | Rooyackers, R. | |
dc.contributor.author | Simoen, E. | |
dc.contributor.author | Claeys, C. | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.contributor.institution | Imec | |
dc.contributor.institution | KU Leuven | |
dc.date.accessioned | 2018-12-11T16:47:14Z | |
dc.date.available | 2018-12-11T16:47:14Z | |
dc.date.issued | 2017-04-25 | |
dc.description.abstract | The goal of this work is to study the performance of current mirror circuits designed with line tunnel field effect transistor (TFET) devices and compare the suitability of this technology with alternatives such as point TFETs and FinFETs. Experimental results have been obtained at room and high temperatures and the analyses focused on parameters such as the magnitude of the on-state current and the sensitivity of the current transfer ratio to channel dimensions mismatch and to the temperature. Line TFETs exhibited higher on-state current than point TFETs, in spite of a higher susceptibility to the channel length. When band-to-band tunneling prevails for both input and output transistors, the current transfer ratio with line TFETs presented a nearly linear dependence on the temperature due to bandgap narrowing. This way, a general equation of the current transfer ratio for circuits designed with the three highlighted technologies is proposed. Globally, it was observed that, unless a very low sensitivity to channel length mismatch is required, line TFET devices are a very suitable alternative for current mirror circuits, since this technology provides much higher on-state currents than point TFETs, and at the same time it is much less sensitive to temperature variations than FinFET transistors. | en |
dc.description.affiliation | LSI/PSI/USP University of Sao Paulo | |
dc.description.affiliation | Sao Paulo State University (UNESP) Campus Sao Joao | |
dc.description.affiliation | Imec | |
dc.description.affiliation | E. E. Dept KU Leuven | |
dc.description.affiliationUnesp | Sao Paulo State University (UNESP) Campus Sao Joao | |
dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
dc.description.sponsorship | Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) | |
dc.identifier | http://dx.doi.org/10.1088/1361-6641/aa6764 | |
dc.identifier.citation | Semiconductor Science and Technology, v. 32, n. 5, 2017. | |
dc.identifier.doi | 10.1088/1361-6641/aa6764 | |
dc.identifier.file | 2-s2.0-85018950805.pdf | |
dc.identifier.issn | 1361-6641 | |
dc.identifier.issn | 0268-1242 | |
dc.identifier.lattes | 0496909595465696 | |
dc.identifier.orcid | 0000-0002-0886-7798 | |
dc.identifier.scopus | 2-s2.0-85018950805 | |
dc.identifier.uri | http://hdl.handle.net/11449/169703 | |
dc.language.iso | eng | |
dc.relation.ispartof | Semiconductor Science and Technology | |
dc.relation.ispartofsjr | 0,757 | |
dc.relation.ispartofsjr | 0,757 | |
dc.rights.accessRights | Acesso aberto | |
dc.source | Scopus | |
dc.subject | analog circuits | |
dc.subject | current mirror | |
dc.subject | FinFET | |
dc.subject | temperature impact | |
dc.subject | TFET | |
dc.title | Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures | en |
dc.type | Artigo | |
dspace.entity.type | Publication | |
unesp.author.lattes | 0496909595465696[3] | |
unesp.author.orcid | 0000-0002-0886-7798[3] |
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