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Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures

dc.contributor.authorMartino, M. D.V.
dc.contributor.authorMartino, J. A.
dc.contributor.authorAgopian, P. G.D. [UNESP]
dc.contributor.authorVandooren, A.
dc.contributor.authorRooyackers, R.
dc.contributor.authorSimoen, E.
dc.contributor.authorClaeys, C.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionImec
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:47:14Z
dc.date.available2018-12-11T16:47:14Z
dc.date.issued2017-04-25
dc.description.abstractThe goal of this work is to study the performance of current mirror circuits designed with line tunnel field effect transistor (TFET) devices and compare the suitability of this technology with alternatives such as point TFETs and FinFETs. Experimental results have been obtained at room and high temperatures and the analyses focused on parameters such as the magnitude of the on-state current and the sensitivity of the current transfer ratio to channel dimensions mismatch and to the temperature. Line TFETs exhibited higher on-state current than point TFETs, in spite of a higher susceptibility to the channel length. When band-to-band tunneling prevails for both input and output transistors, the current transfer ratio with line TFETs presented a nearly linear dependence on the temperature due to bandgap narrowing. This way, a general equation of the current transfer ratio for circuits designed with the three highlighted technologies is proposed. Globally, it was observed that, unless a very low sensitivity to channel length mismatch is required, line TFET devices are a very suitable alternative for current mirror circuits, since this technology provides much higher on-state currents than point TFETs, and at the same time it is much less sensitive to temperature variations than FinFET transistors.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationSao Paulo State University (UNESP) Campus Sao Joao
dc.description.affiliationImec
dc.description.affiliationE. E. Dept KU Leuven
dc.description.affiliationUnespSao Paulo State University (UNESP) Campus Sao Joao
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.identifierhttp://dx.doi.org/10.1088/1361-6641/aa6764
dc.identifier.citationSemiconductor Science and Technology, v. 32, n. 5, 2017.
dc.identifier.doi10.1088/1361-6641/aa6764
dc.identifier.file2-s2.0-85018950805.pdf
dc.identifier.issn1361-6641
dc.identifier.issn0268-1242
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-85018950805
dc.identifier.urihttp://hdl.handle.net/11449/169703
dc.language.isoeng
dc.relation.ispartofSemiconductor Science and Technology
dc.relation.ispartofsjr0,757
dc.relation.ispartofsjr0,757
dc.rights.accessRightsAcesso aberto
dc.sourceScopus
dc.subjectanalog circuits
dc.subjectcurrent mirror
dc.subjectFinFET
dc.subjecttemperature impact
dc.subjectTFET
dc.titleAnalysis of current mirror circuits designed with line tunnel FET devices at different temperaturesen
dc.typeArtigo
dspace.entity.typePublication
unesp.author.lattes0496909595465696[3]
unesp.author.orcid0000-0002-0886-7798[3]

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