Charge-trap memory effect in spray deposited ZnO-based electrolyte-gated transistors operating at low voltage
| dc.contributor.author | Vieira, Douglas Henrique [UNESP] | |
| dc.contributor.author | Nogueira, Gabriel Leonardo [UNESP] | |
| dc.contributor.author | Nascimento, Mayk Rodrigues [UNESP] | |
| dc.contributor.author | Fugikawa-Santos, Lucas [UNESP] | |
| dc.contributor.author | Alves, Neri [UNESP] | |
| dc.contributor.institution | Universidade Estadual Paulista (UNESP) | |
| dc.date.accessioned | 2025-04-29T18:57:09Z | |
| dc.date.issued | 2023-09-01 | |
| dc.description.abstract | Charge-trap memory phenomena were demonstrated in an electrolyte-gated transistor (EGT) using a spray-coated zinc oxide (ZnO) active layer and a cellulose-based electrolyte. The EGT exhibited efficient programming and erasing characteristics at low voltages, shifting the threshold voltage and the magnitude of the on-current. This behavior is discussed in terms of the influence of charged trapping states at the ZnO/electrolyte interface and within the ZnO bulk. The presence of these traps leads to a shift in the mobility from 0.57 ± 0.16 cm2 V−1 s−1 in the initial state to 0.02 ± 0.01 cm2 V−1 s−1 when programmed. Retention experiments revealed improved stability of the memory state when a low positive voltage is applied to the gate, indicating that the device's characteristics are extremely sensitive to the trapping/detrapping of charges at the semiconductor/electrolyte interface. Capacitance spectroscopy measurements using planar and metal-insulator-semiconductor configurations within the same device were used to analyze the charging dynamics of the trap states at different programming states. | en |
| dc.description.affiliation | São Paulo State University – UNESP Physics Department, SP | |
| dc.description.affiliation | São Paulo State University – UNESP Institute of Geosciences and Exact Sciences (IGCE) Physics Department, SP | |
| dc.description.affiliationUnesp | São Paulo State University – UNESP Physics Department, SP | |
| dc.description.affiliationUnesp | São Paulo State University – UNESP Institute of Geosciences and Exact Sciences (IGCE) Physics Department, SP | |
| dc.description.sponsorship | Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) | |
| dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
| dc.description.sponsorship | Instituto Nacional de Ciência e Tecnologia em Eletrônica Orgânica | |
| dc.description.sponsorship | Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) | |
| dc.description.sponsorshipId | FAPESP: 2019/08019-9 | |
| dc.description.sponsorshipId | FAPESP: 2020/12282-4 | |
| dc.format.extent | 118-125 | |
| dc.identifier | http://dx.doi.org/10.1016/j.cap.2023.06.012 | |
| dc.identifier.citation | Current Applied Physics, v. 53, p. 118-125. | |
| dc.identifier.doi | 10.1016/j.cap.2023.06.012 | |
| dc.identifier.issn | 1567-1739 | |
| dc.identifier.scopus | 2-s2.0-85164668789 | |
| dc.identifier.uri | https://hdl.handle.net/11449/301073 | |
| dc.language.iso | eng | |
| dc.relation.ispartof | Current Applied Physics | |
| dc.source | Scopus | |
| dc.subject | Charge-trap memory | |
| dc.subject | Low voltage | |
| dc.subject | Spray-coating | |
| dc.subject | Transistor | |
| dc.title | Charge-trap memory effect in spray deposited ZnO-based electrolyte-gated transistors operating at low voltage | en |
| dc.type | Artigo | pt |
| dspace.entity.type | Publication | |
| unesp.author.orcid | 0000-0002-2813-5842[1] | |
| unesp.author.orcid | 0000-0001-9164-9697[2] | |
| unesp.author.orcid | 0000-0002-7816-4561[3] | |
| unesp.author.orcid | 0000-0001-8001-301X[5] | |
| unesp.campus | Universidade Estadual Paulista (UNESP), Instituto de Geociências e Ciências Exatas, Rio Claro | pt |

