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Publicação:
Experimental comparison between relaxed and strained Ge pFinFETs

dc.contributor.authorOliveira, A. V.
dc.contributor.authorAgopian, P. G. D. [UNESP]
dc.contributor.authorMartino, J. A.
dc.contributor.authorSimoen, E.
dc.contributor.authorMitard, J.
dc.contributor.authorWitters, L.
dc.contributor.authorCollaert, N.
dc.contributor.authorClaeys, C.
dc.contributor.authorSarafis, P.
dc.contributor.authorNassiopoulou, A. G.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionImec
dc.contributor.institutionUniv Ghent
dc.contributor.institutionKatholieke Univ Leuven
dc.date.accessioned2018-11-26T15:47:29Z
dc.date.available2018-11-26T15:47:29Z
dc.date.issued2017-01-01
dc.description.abstractThe experimental comparison between relaxed and strained Ge pFinFETs operating at room temperature is discussed. Although, the strain into the channel improves the drain current for wide transistors due to the boost of hole mobility, the gate stack engineering has to be further studied in order to solve the threshold voltage shift. The relaxed channel achieves a lower subthreshold swing compared to the strained one, since the latter presents a higher source/drain leakage current. Considering a figure of merit for analog applications, i.e., intrinsic voltage gain AV, no relevant difference between the relaxed and strained channel performances has been shown for short devices while the relaxed ones present a higher Av for longer devices.en
dc.description.affiliationUniv Sao Paulo, LSI PSI EPUSP, Sao Paulo, Brazil
dc.description.affiliationUNESP, Sao Joao Da Boa Vista, Brazil
dc.description.affiliationImec, Leuven, Belgium
dc.description.affiliationUniv Ghent, Dept Solid St Sci, Ghent, Belgium
dc.description.affiliationKatholieke Univ Leuven, ESAT, EE, Leuven, Belgium
dc.description.affiliationUnespUNESP, Sao Joao Da Boa Vista, Brazil
dc.description.sponsorshipCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.description.sponsorshipFWO
dc.format.extent180-183
dc.identifier.citation2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017). New York: Ieee, p. 180-183, 2017.
dc.identifier.issn2330-5738
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.urihttp://hdl.handle.net/11449/160099
dc.identifier.wosWOS:000425210900048
dc.language.isoeng
dc.publisherIeee
dc.relation.ispartof2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017)
dc.rights.accessRightsAcesso abertopt
dc.sourceWeb of Science
dc.subjectFinFET
dc.subjectgermanium
dc.subjectp-type
dc.subjectstrained
dc.subjectrelaxed
dc.titleExperimental comparison between relaxed and strained Ge pFinFETsen
dc.typeTrabalho apresentado em eventopt
dcterms.licensehttp://www.ieee.org/publications_standards/publications/rights/rights_policies.html
dcterms.rightsHolderIeee
dspace.entity.typePublication
unesp.author.lattes0496909595465696[2]
unesp.author.orcid0000-0002-0886-7798[2]
unesp.campusUniversidade Estadual Paulista (UNESP), Faculdade de Engenharia, São João da Boa Vistapt

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