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Low temperature effect on strained and relaxed Ge pFinFETs STI last processes

dc.contributor.authorOliveira, A. V.
dc.contributor.authorSimoen, E.
dc.contributor.authorAgopian, P. G.D. [UNESP]
dc.contributor.authorMartino, J. A.
dc.contributor.authorMitard, J.
dc.contributor.authorWitters, L.
dc.contributor.authorLanger, R.
dc.contributor.authorCollaert, N.
dc.contributor.authorThean, A.
dc.contributor.authorClaeys, C.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionImec
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionNational University of Singapore
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:44:08Z
dc.date.available2018-12-11T16:44:08Z
dc.date.issued2016-01-01
dc.description.abstractGe pFinFETs, fabricated either with an STI last process on a Geon-Si virtual substrates or a SiGe strain-relaxed buffer, have been systematically evaluated at temperatures from 200 K down to 77 K. In the first cases, the Ge channel is relaxed, while in the second case, compressively strained fins have been obtained. Cryogenic testing shows to be an important tool for evaluating the static device performance parameters and it helps to resolve the impact of strain on the drain current. Apart from that, the off-state leakage in the subthreshold region can be evaluated as a function of temperature, showing that besides thermal Shockley-Read-Hall generation, other field-assisted mechanisms play a role.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationImec
dc.description.affiliationUNESP Univ. Estadual Paulista
dc.description.affiliationElectrical and Comp. Eng. Dept. National University of Singapore
dc.description.affiliationE.E. Dept. KU Leuven
dc.description.affiliationUnespUNESP Univ. Estadual Paulista
dc.format.extent213-218
dc.identifierhttp://dx.doi.org/10.1149/07504.0213ecst
dc.identifier.citationECS Transactions, v. 75, n. 4, p. 213-218, 2016.
dc.identifier.dimensionspub.1010744359
dc.identifier.doi10.1149/07504.0213ecst
dc.identifier.file2-s2.0-84991716138.pdf
dc.identifier.issn1938-6737
dc.identifier.issn1938-5862
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.orcid0000-0002-9289-5897
dc.identifier.orcid0000-0002-0772-5501
dc.identifier.orcid0000-0002-1132-3468
dc.identifier.orcid0000-0001-8121-6513
dc.identifier.orcid0000-0003-2418-6404
dc.identifier.orcid0000-0002-8062-3165
dc.identifier.orcid0000-0002-6634-4709
dc.identifier.orcid0000-0002-7422-079X
dc.identifier.scopus2-s2.0-84991716138
dc.identifier.urihttp://hdl.handle.net/11449/169048
dc.language.isoeng
dc.publisherThe Electrochemical Society
dc.relation.ispartofECS Transactions
dc.relation.ispartofsjr0,225
dc.relation.ispartofsjr0,225
dc.rights.accessRightsAcesso abertopt
dc.sourceScopus
dc.sourceDimensions
dc.titleLow temperature effect on strained and relaxed Ge pFinFETs STI last processesen
dc.typeTrabalho apresentado em eventopt
dspace.entity.typePublication
unesp.author.lattes0496909595465696[3]
unesp.author.orcid0000-0002-0886-7798[3]

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