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Split CV mobility at low temperature operation of Ge pFinFETs fabricated with STI first and last processes

dc.contributor.authorOliveira, A. V.
dc.contributor.authorSimoen, E.
dc.contributor.authorAgopian, P. G.D. [UNESP]
dc.contributor.authorMartino, J. A.
dc.contributor.authorMitard, J.
dc.contributor.authorWitters, L.
dc.contributor.authorLanger, R.
dc.contributor.authorCollaert, N.
dc.contributor.authorThean, A.
dc.contributor.authorClaeys, C.
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionImec
dc.contributor.institutionGhent University
dc.contributor.institutionUniversidade Estadual Paulista (Unesp)
dc.contributor.institutionKU Leuven
dc.date.accessioned2018-12-11T16:44:23Z
dc.date.available2018-12-11T16:44:23Z
dc.date.issued2016-10-13
dc.description.abstractThe effective hole mobility of long strained Ge pFinFETs, fabricated with shallow trench isolation (STI) first and last approaches, is systematically evaluated from room temperature down to 77 K, from planar-like (100 nm) to narrow (20 nm) devices. The goal is to identify the dominant scattering mechanism. Here, the split capacitance-voltage (CV) technique has been applied, based on combined current-voltage (I-V) and CV measurements. It is shown that even at 77 K, the phonon scattering mechanism dominates the STI last process, while the Coulomb scattering strongly affects the STI first approach. On the other hand, the latter shows slightly higher hole mobility compared to the STI last counterpart.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationImec
dc.description.affiliationDepartment of Solid State Sciences Ghent University
dc.description.affiliationUNESP Universidade Estadual Paulista
dc.description.affiliationEE Department KU Leuven
dc.description.affiliationUnespUNESP Universidade Estadual Paulista
dc.description.sponsorshipCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipFonds Wetenschappelijk Onderzoek
dc.identifierhttp://dx.doi.org/10.1088/0268-1242/31/11/114002
dc.identifier.citationSemiconductor Science and Technology, v. 31, n. 11, 2016.
dc.identifier.doi10.1088/0268-1242/31/11/114002
dc.identifier.file2-s2.0-84993995815.pdf
dc.identifier.issn1361-6641
dc.identifier.issn0268-1242
dc.identifier.lattes0496909595465696
dc.identifier.orcid0000-0002-0886-7798
dc.identifier.scopus2-s2.0-84993995815
dc.identifier.urihttp://hdl.handle.net/11449/169081
dc.language.isoeng
dc.relation.ispartofSemiconductor Science and Technology
dc.relation.ispartofsjr0,757
dc.relation.ispartofsjr0,757
dc.rights.accessRightsAcesso aberto
dc.sourceScopus
dc.subjectGe pFinFETs
dc.subjectlow temperature operation
dc.subjectsplit CV mobility
dc.subjectSTI first process
dc.subjectSTI last process
dc.titleSplit CV mobility at low temperature operation of Ge pFinFETs fabricated with STI first and last processesen
dc.typeArtigo
dspace.entity.typePublication
unesp.author.lattes0496909595465696[2]
unesp.author.orcid0000-0002-0886-7798[2]

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