Proposal of a p-type Back-Enhanced Tunnel Field Effect Transistor
| dc.contributor.author | Mori, C. A.B. | |
| dc.contributor.author | Agopian, P. G.D. [UNESP] | |
| dc.contributor.author | Martino, J. A. | |
| dc.contributor.institution | Universidade de São Paulo (USP) | |
| dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
| dc.date.accessioned | 2020-12-12T01:16:45Z | |
| dc.date.available | 2020-12-12T01:16:45Z | |
| dc.date.issued | 2019-04-01 | |
| dc.description.abstract | In this paper we propose a new p-type Tunnel Field Effect Transistor based on the planar Back-Enhanced structure (BE-pTFET), by removing the p-type drain doping and using a back bias to obtain similar on-state behaviors to those of a conventional pTFET, while eliminating the ambipolar effect. | en |
| dc.description.affiliation | LSI/PSI/USP University of Sao Paulo | |
| dc.description.affiliation | Sao Paulo State University (UNESP) | |
| dc.description.affiliationUnesp | Sao Paulo State University (UNESP) | |
| dc.identifier | http://dx.doi.org/10.1109/EUROSOI-ULIS45800.2019.9041908 | |
| dc.identifier.citation | 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2019. | |
| dc.identifier.dimensions | pub.1125756666 | |
| dc.identifier.doi | 10.1109/EUROSOI-ULIS45800.2019.9041908 | |
| dc.identifier.isbn | 978-1-7281-1658-7 | |
| dc.identifier.orcid | 0000-0002-5602-5472 | |
| dc.identifier.orcid | 0000-0002-0886-7798 | |
| dc.identifier.orcid | 0000-0001-8121-6513 | |
| dc.identifier.scopus | 2-s2.0-85080744450 | |
| dc.identifier.uri | http://hdl.handle.net/11449/198580 | |
| dc.language.iso | eng | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
| dc.relation.ispartof | 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2019 | |
| dc.rights.accessRights | Acesso restrito | pt |
| dc.rights.sourceRights | closed | |
| dc.source | Scopus | |
| dc.source | Dimensions | |
| dc.subject | Silicon-On-Insulator (SOI) | |
| dc.subject | Tunnel Field Effect Transistor (TFET) | |
| dc.subject | Ultra-Thin Body and Buried oxide (UTBB) | |
| dc.title | Proposal of a p-type Back-Enhanced Tunnel Field Effect Transistor | en |
| dc.type | Trabalho apresentado em evento | pt |
| dspace.entity.type | Publication |