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Operational Transconductance Amplifier Design with Gate-All-Around Nanosheet MOSFET using Experimental Lookup Table Approach

dc.contributor.authorSousa, Julia C. S.
dc.contributor.authorPerina, Welder F.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorVeloso, Anabela
dc.contributor.authorMartino, Joao A.
dc.contributor.authorAgopian, Paula G. D. [UNESP]
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionImec
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)
dc.date.accessioned2022-04-28T19:46:39Z
dc.date.available2022-04-28T19:46:39Z
dc.date.issued2021-09-01
dc.description.abstractThis paper presents the design of an Operational Transconductance Amplifier (OTA) with Gate-All-Around Nanosheet MOSFETs (GAA-NSH). The circuit simulation was performed using an experimental Lookup Table (LUT) approach. The experimental drain current and gate capacitance were extracted and used in a Verilog-A model in order to design the OTA for different transistor efficiency (gm/ID) values. The results present a compromise between power consumption (PC), voltage gain (AV) and the Gain-Bandwidth-Product (GBW). For gm/ID of 8 V-1 an AV of 71.8 dB is obtained for a GBW of 361.3 MHz. These results were compared with other OTA designs using FinFET and TFET devices. The NSH OTA presents higher GBW, and considering the Av and PC, while NSH present better behavior than FinFETs, the behavior is worse than TFET OTA circuit for strong inversion operation.en
dc.description.affiliationUniversity of Sao Paulo LSI/PSI/USP
dc.description.affiliationImec
dc.description.affiliationUnesp Sao Paulo State University
dc.description.affiliationUnespUnesp Sao Paulo State University
dc.identifierhttp://dx.doi.org/10.1109/EuroSOI-ULIS53016.2021.9560689
dc.identifier.citation2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EuroSOI-ULIS 2021.
dc.identifier.doi10.1109/EuroSOI-ULIS53016.2021.9560689
dc.identifier.scopus2-s2.0-85118386084
dc.identifier.urihttp://hdl.handle.net/11449/222783
dc.language.isoeng
dc.relation.ispartof2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EuroSOI-ULIS 2021
dc.sourceScopus
dc.subjectAnalog Circuit Design
dc.subjectLookup Table
dc.subjectNanosheet (NSH)
dc.subjectOperational Transconductance Amplifier
dc.subjectTransistor Efficiency (gm/ID)
dc.titleOperational Transconductance Amplifier Design with Gate-All-Around Nanosheet MOSFET using Experimental Lookup Table Approachen
dc.typeTrabalho apresentado em evento
dspace.entity.typePublication

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