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Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

dc.contributor.authorSilva, Fábio A. [UNESP]
dc.contributor.authorDoria, Rodrigo T.
dc.contributor.authorSimoen, E.
dc.contributor.authorAndrade, M. G.C. [UNESP]
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)
dc.contributor.institutionCentro Universitário FEI
dc.contributor.institutionImec Leuven
dc.contributor.institutionGhent University
dc.date.accessioned2025-04-29T20:14:03Z
dc.date.issued2023-09-27
dc.description.abstractIt has been verified through numerical simulations calibrated to experimental data the changes that the insertion of a germanium layer can bring to the electrical power generation of a silicon solar cell. The insertion of a germanium layer on top or below a silicon PIN diode designed in SOI technology has been considered. Results showed that different semiconductor characteristics (bandgap, mobility, and absorption coefficients) result in a general improvement in the solar cell performance, being able to reach a power 136% greater than the device without the heterogeneous layer. In the evaluated device the average power was improved from 9.43 nW to 14.92 nW with the Ge layer insertion. Besides that, the analysis has allowed for a better understanding of the phenomena that occur in the photogeneration of a cell with a heterojunction between germanium and silicon.en
dc.description.affiliationSão Paulo State University (Unesp) Institute of Science and Technology
dc.description.affiliationCentro Universitário FEI
dc.description.affiliationImec Leuven
dc.description.affiliationGhent University, Sint-Pietersnieuwstraat 25
dc.description.affiliationUnespSão Paulo State University (Unesp) Institute of Science and Technology
dc.description.sponsorshipCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)
dc.description.sponsorshipIdFAPESP: 2023/00123-7
dc.description.sponsorshipIdCNPq: 303938/2020-0
dc.identifierhttp://dx.doi.org/10.29292/jics.v18i2.746
dc.identifier.citationJournal of Integrated Circuits and Systems, v. 18, n. 2, 2023.
dc.identifier.doi10.29292/jics.v18i2.746
dc.identifier.issn1872-0234
dc.identifier.issn1807-1953
dc.identifier.scopus2-s2.0-85173487883
dc.identifier.urihttps://hdl.handle.net/11449/308942
dc.language.isoeng
dc.relation.ispartofJournal of Integrated Circuits and Systems
dc.sourceScopus
dc.subjectGermanium
dc.subjectHeterojunction
dc.subjectPIN Diodes
dc.subjectSOI
dc.subjectSolar cells
dc.titleLateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafersen
dc.typeArtigopt
dspace.entity.typePublication

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