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MISHEMT intrinsic voltage gain under multiple channel output characteristics

dc.contributor.authorCanales, Bruno Godoy
dc.contributor.authorPerina, Welder Fernandes
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorSimoen, Eddy
dc.contributor.authorPeralagu, Uthayasankaran
dc.contributor.authorCollaert, Nadine
dc.contributor.authorDer Agopian, Paula Ghedini [UNESP]
dc.contributor.institutionUniversidade de São Paulo (USP)
dc.contributor.institutionImec
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)
dc.date.accessioned2025-04-29T20:06:18Z
dc.date.issued2023-11-01
dc.description.abstractIn this paper the MISHEMT device (metal/Si3N4/AlGaN/AlN/GaN - metal-insulator-semiconductor high electron mobility transistor) is studied focusing mainly on the impact of the multiple conductions on the intrinsic voltage gain (A v). It is shown that the total drain current is composed of three different drain current components, whereof one is related to the MIS channel and the other two are related to high electron mobility transistor (HEMT) channels. The device output characteristics present double drain voltage saturation that gives rise to a double plateau in the saturation region of the output characteristics. This behavior relies also on the gate voltage, so the output characteristics and analog parameters extraction are bias dependent. The intrinsic voltage gain increases thanks to the early voltage increment in the second plateau where HEMT conduction is dominant. Electron concentration profiles were simulated in order to investigate the device saturation regime.en
dc.description.affiliationLSI/PSI/USP University of Sao Paulo
dc.description.affiliationImec
dc.description.affiliationUNESP Sao Paulo State University
dc.description.affiliationUnespUNESP Sao Paulo State University
dc.identifierhttp://dx.doi.org/10.1088/1361-6641/acfa1f
dc.identifier.citationSemiconductor Science and Technology, v. 38, n. 11, 2023.
dc.identifier.doi10.1088/1361-6641/acfa1f
dc.identifier.issn1361-6641
dc.identifier.issn0268-1242
dc.identifier.scopus2-s2.0-85173582228
dc.identifier.urihttps://hdl.handle.net/11449/306454
dc.language.isoeng
dc.relation.ispartofSemiconductor Science and Technology
dc.sourceScopus
dc.subject2DEG
dc.subjectGaN
dc.subjectintrinsic voltage gain
dc.subjectMISHEMT
dc.titleMISHEMT intrinsic voltage gain under multiple channel output characteristicsen
dc.typeArtigopt
dspace.entity.typePublication
unesp.author.orcid0000-0003-1013-8073[1]
unesp.author.orcid0000-0001-6205-351X[2]
unesp.author.orcid0000-0001-8121-6513[3]
unesp.author.orcid0000-0002-5218-4046[4]
unesp.author.orcid0000-0002-0886-7798 0000-0002-0886-7798[7]

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