MISHEMT intrinsic voltage gain under multiple channel output characteristics
| dc.contributor.author | Canales, Bruno Godoy | |
| dc.contributor.author | Perina, Welder Fernandes | |
| dc.contributor.author | Martino, Joao Antonio | |
| dc.contributor.author | Simoen, Eddy | |
| dc.contributor.author | Peralagu, Uthayasankaran | |
| dc.contributor.author | Collaert, Nadine | |
| dc.contributor.author | Der Agopian, Paula Ghedini [UNESP] | |
| dc.contributor.institution | Universidade de São Paulo (USP) | |
| dc.contributor.institution | Imec | |
| dc.contributor.institution | Universidade Estadual Paulista (UNESP) | |
| dc.date.accessioned | 2025-04-29T20:06:18Z | |
| dc.date.issued | 2023-11-01 | |
| dc.description.abstract | In this paper the MISHEMT device (metal/Si3N4/AlGaN/AlN/GaN - metal-insulator-semiconductor high electron mobility transistor) is studied focusing mainly on the impact of the multiple conductions on the intrinsic voltage gain (A v). It is shown that the total drain current is composed of three different drain current components, whereof one is related to the MIS channel and the other two are related to high electron mobility transistor (HEMT) channels. The device output characteristics present double drain voltage saturation that gives rise to a double plateau in the saturation region of the output characteristics. This behavior relies also on the gate voltage, so the output characteristics and analog parameters extraction are bias dependent. The intrinsic voltage gain increases thanks to the early voltage increment in the second plateau where HEMT conduction is dominant. Electron concentration profiles were simulated in order to investigate the device saturation regime. | en |
| dc.description.affiliation | LSI/PSI/USP University of Sao Paulo | |
| dc.description.affiliation | Imec | |
| dc.description.affiliation | UNESP Sao Paulo State University | |
| dc.description.affiliationUnesp | UNESP Sao Paulo State University | |
| dc.identifier | http://dx.doi.org/10.1088/1361-6641/acfa1f | |
| dc.identifier.citation | Semiconductor Science and Technology, v. 38, n. 11, 2023. | |
| dc.identifier.doi | 10.1088/1361-6641/acfa1f | |
| dc.identifier.issn | 1361-6641 | |
| dc.identifier.issn | 0268-1242 | |
| dc.identifier.scopus | 2-s2.0-85173582228 | |
| dc.identifier.uri | https://hdl.handle.net/11449/306454 | |
| dc.language.iso | eng | |
| dc.relation.ispartof | Semiconductor Science and Technology | |
| dc.source | Scopus | |
| dc.subject | 2DEG | |
| dc.subject | GaN | |
| dc.subject | intrinsic voltage gain | |
| dc.subject | MISHEMT | |
| dc.title | MISHEMT intrinsic voltage gain under multiple channel output characteristics | en |
| dc.type | Artigo | pt |
| dspace.entity.type | Publication | |
| unesp.author.orcid | 0000-0003-1013-8073[1] | |
| unesp.author.orcid | 0000-0001-6205-351X[2] | |
| unesp.author.orcid | 0000-0001-8121-6513[3] | |
| unesp.author.orcid | 0000-0002-5218-4046[4] | |
| unesp.author.orcid | 0000-0002-0886-7798 0000-0002-0886-7798[7] |

