Publicação: Analysis of omega-gate nanowire soi mosfet under analog point of view
dc.contributor.author | Perina, Welder F. | |
dc.contributor.author | Martino, João A. | |
dc.contributor.author | Agopian, Paula G. D. [UNESP] | |
dc.contributor.institution | Universidade de São Paulo (USP) | |
dc.contributor.institution | Universidade Estadual Paulista (Unesp) | |
dc.date.accessioned | 2020-12-12T01:26:49Z | |
dc.date.available | 2020-12-12T01:26:49Z | |
dc.date.issued | 2020-01-01 | |
dc.description.abstract | This paper presents an evaluation of omega-gate nanowire n-and p-type SOI MOSFETs performance focusing on the main analog figures of merit, like saturation transcon-ductance (gmsat), output conductance (gD), transconductance over drain current (gm/IDS) ratio, Early voltage (VEA), intrinsic gain (AV) and unit gain frequency (ft). The different channel widths (WNW) and channel lengths (L) were also evaluated. These devices presented values of subthreshold slope near the theoretical limit at room temperature (60 mV/dec), and in the worst case, a DIBL value smaller than 70 mV/V. Showing its immunity to short channel effects (SCEs) in the studied channel length range. The narrowest device showed great electrostatic coupling, improving gm, presenting an unit gain frequency over 200 GHz and intrinsic voltage gain over 80 dB. These values suggests that this device is capable of achieving good performance on new applications such as 5G communications and In-ternet-of-Things (IoT). | en |
dc.description.affiliation | LSI/PSI/USP University of São Paulo | |
dc.description.affiliation | UNESP São Paulo State University | |
dc.description.affiliationUnesp | UNESP São Paulo State University | |
dc.description.sponsorship | Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) | |
dc.description.sponsorship | Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) | |
dc.description.sponsorship | Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP) | |
dc.identifier | http://dx.doi.org/10.29292/jics.v15i1.113 | |
dc.identifier.citation | Journal of Integrated Circuits and Systems, v. 15, n. 1, 2020. | |
dc.identifier.doi | 10.29292/jics.v15i1.113 | |
dc.identifier.issn | 1872-0234 | |
dc.identifier.issn | 1807-1953 | |
dc.identifier.scopus | 2-s2.0-85086123912 | |
dc.identifier.uri | http://hdl.handle.net/11449/198960 | |
dc.language.iso | eng | |
dc.relation.ispartof | Journal of Integrated Circuits and Systems | |
dc.source | Scopus | |
dc.subject | Intrinsic Voltage Gain | |
dc.subject | Nanowire | |
dc.subject | Omega-gate | |
dc.subject | SOI MOSFET | |
dc.subject | Unit-gain Frequency | |
dc.title | Analysis of omega-gate nanowire soi mosfet under analog point of view | en |
dc.type | Artigo | |
dspace.entity.type | Publication |