FPGA discrete wavelet transform encoder/decoder implementation

Cox, Pedro Henrique; De Carvalho, Aparecido Augusto

FPGA discrete wavelet transform encoder/decoder implementation

Data

2006-01-01

Autores

Cox, Pedro Henrique

De Carvalho, Aparecido Augusto

Resumo

In a multi-input an multi-output feedforward wavelet neural network, orthogonal wavelet basis functions are used as activate function instead of sigmoid function of feedforward network. This paper adresses the solution on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. One integrated circuit Encoder/Decoder, ultrasonic range, is presented. © Springer-Verlag Berlin Heidelberg 2006.

Como citar

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v. 4234 LNCS - III, p. 1113-1121.