A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication
Nenhuma Miniatura disponível
Data
2003-04-01
Autores
De Lima, J. A.
Cordeiro, A. S.
Título da Revista
ISSN da Revista
Título de Volume
Editor
Institute of Electrical and Electronics Engineers (IEEE)
Resumo
An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.
Descrição
Palavras-chave
analog memory, four-quadrant multiplier, neural networks, switched-current memory cell
Como citar
IEEE Transactions on Circuits and Systems Ii-analog and Digital Signal Processing. New York: IEEE-Inst Electrical Electronics Engineers Inc., v. 50, n. 4, p. 191-195, 2003.